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clueboard_
| Author | SHA1 | Date |
|---|---|---|
Jack Humbert
|
6d6b166b40 | 7 years ago |
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Jack Humbert
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8ef6b58caa | 7 years ago |
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Jack Humbert
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5e15803cd6 | 7 years ago |
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Jack Humbert
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69f4149c15 | 7 years ago |
skullY
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d9ef7267eb | 7 years ago |
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skullY
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201d7ae3b7 | 7 years ago |
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Jack Humbert
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e821434056 | 7 years ago |
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skullY
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122f2750eb | 7 years ago |
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Jack Humbert
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d5ab12b293 | 7 years ago |
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Jack Humbert
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4e01afb79d | 7 years ago |
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Jack Humbert
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cabca3636c | 7 years ago |
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Jack Humbert
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0b50d8bf17 | 7 years ago |
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skullY
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b86e27a5e8 | 7 years ago |
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skullY
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deb60d28e3 | 7 years ago |
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skullY
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5036de9e13 | 7 years ago |
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skullY
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bef43993ed | 7 years ago |
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skullY
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f27a4af3fb | 7 years ago |
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skullY
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4a346f389e | 7 years ago |
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skullY
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4fedeb8887 | 7 years ago |
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Jack Humbert
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ddb8df99a1 | 7 years ago |
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Jack Humbert
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95d73bff77 | 7 years ago |
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Jack Humbert
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5d398b8f5b | 7 years ago |
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skullY
|
7a34575612 | 7 years ago |
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skullY
|
9f0a978607 | 7 years ago |
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skullY
|
158313fbc7 | 7 years ago |
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skullY
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baa0964670 | 7 years ago |
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skullY
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3e4cc5c945 | 7 years ago |
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skullY
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9b965d1cd4 | 7 years ago |
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skullY
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21ca52fdea | 7 years ago |
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skullY
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31782fa961 | 7 years ago |
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skullY
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36ae7c7d9a | 7 years ago |
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skullY
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2fac65faf3 | 7 years ago |
@ -0,0 +1,18 @@
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||||
# Copyright 2017 skully <skullydazed@gmail.com>
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#
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||||
# This program is free software: you can redistribute it and/or modify
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||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
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||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
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||||
|
||||
ifndef MAKEFILE_INCLUDED
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include ../../Makefile
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endif
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@ -0,0 +1,106 @@
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/*
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||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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||||
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Licensed under the Apache License, Version 2.0 (the "License");
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||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
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||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
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||||
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#include "hal.h"
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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const PALConfig pal_default_config = {
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#if STM32_HAS_GPIOA
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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#endif
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#if STM32_HAS_GPIOB
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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#endif
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#if STM32_HAS_GPIOC
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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#endif
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#if STM32_HAS_GPIOD
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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#endif
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#if STM32_HAS_GPIOE
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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#endif
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#if STM32_HAS_GPIOF
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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#endif
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#if STM32_HAS_GPIOG
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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#endif
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#if STM32_HAS_GPIOH
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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#endif
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#if STM32_HAS_GPIOI
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
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VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
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#endif
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};
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#endif
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/**
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* @brief Early initialization code.
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* @details This initialization must be performed just after stack setup
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* and before any other initialization.
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*/
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void __early_init(void) {
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stm32_clock_init();
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}
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#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
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/**
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* @brief MMC_SPI card detection.
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*/
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bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return true;
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}
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/**
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* @brief MMC_SPI card write protection detection.
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*/
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bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return false;
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}
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#endif
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/**
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* @brief Board-specific initialization code.
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* @todo Add your board-specific code, if any.
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*/
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void boardInit(void) {
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/* Remap PA11->PA9 and PA12->PA10 for USB
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*/
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGCOMPEN;
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SYSCFG->CFGR1 |= SYSCFG_CFGR1_PA11_PA12_RMP;
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}
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@ -0,0 +1,930 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for STMicroelectronics STM32 Nucleo32-F042K6 board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_GENERIC_STM32_F04
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#define BOARD_NAME "Generic STM32F04xx board"
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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* NOTE: HSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0U
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#endif
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#define STM32_LSEDRV (3U << 3U)
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 0U
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#endif
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F042x6
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/*
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* IO pins assignments.
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*/
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#define GPIOA_ARD_A0 0U
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#define GPIOA_ARD_A1 1U
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#define GPIOA_VCP_TX 2U
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#define GPIOA_ARD_A2 3U
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#define GPIOA_ARD_A3 4U
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#define GPIOA_ARD_A4 5U
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#define GPIOA_ARD_A5 6U
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#define GPIOA_ARD_A6 7U
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#define GPIOA_ARD_D9 8U
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#define GPIOA_ARD_D1 9U
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#define GPIOA_ARD_D0 10U
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#define GPIOA_ARD_D10 11U
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#define GPIOA_ARD_D2 12U
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#define GPIOA_SWDIO 13U
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#define GPIOA_SWCLK 14U
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#define GPIOA_VCP_RX 15U
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#define GPIOB_ARD_D3 0U
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#define GPIOB_ARD_D6 1U
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#define GPIOB_PIN2 2U
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#define GPIOB_ARD_D13 3U
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#define GPIOB_LED_GREEN 3U
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#define GPIOB_ARD_D12 4U
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#define GPIOB_ARD_D11 5U
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#define GPIOB_ARD_D5 6U
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#define GPIOB_ARD_A5_ALT 6U
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#define GPIOB_ARD_D4 7U
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#define GPIOB_ARD_A4_ALT 7U
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#define GPIOB_PIN8 8U
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#define GPIOB_PIN9 9U
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#define GPIOB_PIN10 10U
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#define GPIOB_PIN11 11U
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#define GPIOB_PIN12 12U
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#define GPIOB_PIN13 13U
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#define GPIOB_PIN14 14U
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#define GPIOB_PIN15 15U
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#define GPIOC_PIN0 0U
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#define GPIOC_PIN1 1U
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#define GPIOC_PIN2 2U
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#define GPIOC_PIN3 3U
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#define GPIOC_PIN4 4U
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#define GPIOC_PIN5 5U
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#define GPIOC_PIN6 6U
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#define GPIOC_PIN7 7U
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#define GPIOC_PIN8 8U
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#define GPIOC_PIN9 9U
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#define GPIOC_PIN10 10U
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#define GPIOC_PIN11 11U
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#define GPIOC_PIN12 12U
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#define GPIOC_PIN13 13U
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#define GPIOC_PIN14 14U
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#define GPIOC_PIN15 15U
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#define GPIOD_PIN0 0U
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#define GPIOD_PIN1 1U
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#define GPIOD_PIN2 2U
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#define GPIOD_PIN3 3U
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#define GPIOD_PIN4 4U
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#define GPIOD_PIN5 5U
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#define GPIOD_PIN6 6U
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#define GPIOD_PIN7 7U
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#define GPIOD_PIN8 8U
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#define GPIOD_PIN9 9U
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#define GPIOD_PIN10 10U
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#define GPIOD_PIN11 11U
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#define GPIOD_PIN12 12U
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#define GPIOD_PIN13 13U
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#define GPIOD_PIN14 14U
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#define GPIOD_PIN15 15U
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#define GPIOE_PIN0 0U
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#define GPIOE_PIN1 1U
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#define GPIOE_PIN2 2U
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#define GPIOE_PIN3 3U
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#define GPIOE_PIN4 4U
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#define GPIOE_PIN5 5U
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#define GPIOE_PIN6 6U
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#define GPIOE_PIN7 7U
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#define GPIOE_PIN8 8U
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#define GPIOE_PIN9 9U
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#define GPIOE_PIN10 10U
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#define GPIOE_PIN11 11U
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#define GPIOE_PIN12 12U
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#define GPIOE_PIN13 13U
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#define GPIOE_PIN14 14U
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#define GPIOE_PIN15 15U
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#define GPIOF_ARD_D7 0U
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#define GPIOF_ARD_D8 1U
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#define GPIOF_PIN2 2U
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#define GPIOF_PIN3 3U
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#define GPIOF_PIN4 4U
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#define GPIOF_PIN5 5U
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#define GPIOF_PIN6 6U
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#define GPIOF_PIN7 7U
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#define GPIOF_PIN8 8U
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#define GPIOF_PIN9 9U
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#define GPIOF_PIN10 10U
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#define GPIOF_PIN11 11U
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#define GPIOF_PIN12 12U
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#define GPIOF_PIN13 13U
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#define GPIOF_PIN14 14U
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#define GPIOF_PIN15 15U
|
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/*
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* IO lines assignments.
|
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*/
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#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U)
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#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U)
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#define LINE_VCP_TX PAL_LINE(GPIOA, 2U)
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#define LINE_ARD_A2 PAL_LINE(GPIOA, 3U)
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#define LINE_ARD_A3 PAL_LINE(GPIOA, 4U)
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#define LINE_ARD_A4 PAL_LINE(GPIOA, 5U)
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#define LINE_ARD_A5 PAL_LINE(GPIOA, 6U)
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#define LINE_ARD_A6 PAL_LINE(GPIOA, 7U)
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#define LINE_ARD_D9 PAL_LINE(GPIOA, 8U)
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#define LINE_ARD_D1 PAL_LINE(GPIOA, 9U)
|
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#define LINE_ARD_D0 PAL_LINE(GPIOA, 10U)
|
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#define LINE_ARD_D10 PAL_LINE(GPIOA, 11U)
|
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#define LINE_ARD_D2 PAL_LINE(GPIOA, 12U)
|
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#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
|
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#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
|
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#define LINE_VCP_RX PAL_LINE(GPIOA, 15U)
|
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|
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#define LINE_ARD_D3 PAL_LINE(GPIOB, 0U)
|
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#define LINE_ARD_D6 PAL_LINE(GPIOB, 1U)
|
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#define LINE_ARD_D13 PAL_LINE(GPIOB, 3U)
|
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#define LINE_LED_GREEN PAL_LINE(GPIOB, 3U)
|
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#define LINE_ARD_D12 PAL_LINE(GPIOB, 4U)
|
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#define LINE_ARD_D11 PAL_LINE(GPIOB, 5U)
|
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#define LINE_ARD_D5 PAL_LINE(GPIOB, 6U)
|
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#define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U)
|
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#define LINE_ARD_D4 PAL_LINE(GPIOB, 7U)
|
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#define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U)
|
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|
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|
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|
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|
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#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U)
|
||||
#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U)
|
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|
||||
/*
|
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* I/O ports initial setup, this configuration is established soon after reset
|
||||
* in the initialization code.
|
||||
* Please refer to the STM32 Reference Manual for details.
|
||||
*/
|
||||
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
|
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
|
||||
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
|
||||
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
|
||||
#define PIN_ODR_LOW(n) (0U << (n))
|
||||
#define PIN_ODR_HIGH(n) (1U << (n))
|
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
|
||||
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
|
||||
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
|
||||
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
|
||||
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
|
||||
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
|
||||
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
|
||||
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
|
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
|
||||
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
|
||||
|
||||
/*
|
||||
* GPIOA setup:
|
||||
*
|
||||
* PA0 - ARD_A0 (input pullup).
|
||||
* PA1 - ARD_A1 (input pullup).
|
||||
* PA2 - VCP_TX (alternate 1).
|
||||
* PA3 - ARD_A2 (input pullup).
|
||||
* PA4 - ARD_A3 (input pullup).
|
||||
* PA5 - ARD_A4 (input pullup).
|
||||
* PA6 - ARD_A5 (input pullup).
|
||||
* PA7 - ARD_A6 (input pullup).
|
||||
* PA8 - ARD_D9 (input pullup).
|
||||
* PA9 - ARD_D1 (input pullup).
|
||||
* PA10 - ARD_D0 (input pullup).
|
||||
* PA11 - ARD_D10 (input pullup).
|
||||
* PA12 - ARD_D2 (input pullup).
|
||||
* PA13 - SWDIO (alternate 0).
|
||||
* PA14 - SWCLK (alternate 0).
|
||||
* PA15 - VCP_RX (alternate 1).
|
||||
*/
|
||||
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A1) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A2) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A3) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A4) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A5) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A6) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D9) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D1) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D0) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D10) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D2) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \
|
||||
PIN_OSPEED_LOW(GPIOA_VCP_TX) | \
|
||||
PIN_OSPEED_LOW(GPIOA_ARD_A2) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A3) | \
|
||||
PIN_OSPEED_LOW(GPIOA_ARD_A4) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A5) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A6) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D1) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D0) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \
|
||||
PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
|
||||
PIN_PUPDR_FLOATING(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A1) | \
|
||||
PIN_ODR_HIGH(GPIOA_VCP_TX) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A2) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A3) | \
|
||||
PIN_ODR_LOW(GPIOA_ARD_A4) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A5) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A6) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D9) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D1) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D0) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D10) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D2) | \
|
||||
PIN_ODR_HIGH(GPIOA_SWDIO) | \
|
||||
PIN_ODR_HIGH(GPIOA_SWCLK) | \
|
||||
PIN_ODR_HIGH(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A1, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_VCP_TX, 1) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A2, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A3, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A4, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A5, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A6, 0))
|
||||
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D1, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D0, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D10, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D2, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_VCP_RX, 1))
|
||||
|
||||
/*
|
||||
* GPIOB setup:
|
||||
*
|
||||
* PB0 - ARD_D3 (input pullup).
|
||||
* PB1 - ARD_D6 (input pullup).
|
||||
* PB2 - PIN2 (input pullup).
|
||||
* PB3 - ARD_D13 LED_GREEN (output pushpull maximum).
|
||||
* PB4 - ARD_D12 (input pullup).
|
||||
* PB5 - ARD_D11 (input pullup).
|
||||
* PB6 - ARD_D5 ARD_A5_ALT (input pullup).
|
||||
* PB7 - ARD_D4 ARD_A4_ALT (input pullup).
|
||||
* PB8 - PIN8 (input pullup).
|
||||
* PB9 - PIN9 (input pullup).
|
||||
* PB10 - PIN10 (input pullup).
|
||||
* PB11 - PIN11 (input pullup).
|
||||
* PB12 - PIN12 (input pullup).
|
||||
* PB13 - PIN13 (input pullup).
|
||||
* PB14 - PIN14 (input pullup).
|
||||
* PB15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D6) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN2) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D12) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D11) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D5) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D4) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D11) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
||||
PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D6) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN2) | \
|
||||
PIN_ODR_LOW(GPIOB_ARD_D13) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D12) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D11) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D5) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D4) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_D3, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D6, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D13, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D12, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D11, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D5, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D4, 0))
|
||||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOC setup:
|
||||
*
|
||||
* PC0 - PIN0 (input pullup).
|
||||
* PC1 - PIN1 (input pullup).
|
||||
* PC2 - PIN2 (input pullup).
|
||||
* PC3 - PIN3 (input pullup).
|
||||
* PC4 - PIN4 (input pullup).
|
||||
* PC5 - PIN5 (input pullup).
|
||||
* PC6 - PIN6 (input pullup).
|
||||
* PC7 - PIN7 (input pullup).
|
||||
* PC8 - PIN8 (input pullup).
|
||||
* PC9 - PIN9 (input pullup).
|
||||
* PC10 - PIN10 (input pullup).
|
||||
* PC11 - PIN11 (input pullup).
|
||||
* PC12 - PIN12 (input pullup).
|
||||
* PC13 - PIN13 (input pullup).
|
||||
* PC14 - PIN14 (input pullup).
|
||||
* PC15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN1) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN7, 0))
|
||||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOD setup:
|
||||
*
|
||||
* PD0 - PIN0 (input pullup).
|
||||
* PD1 - PIN1 (input pullup).
|
||||
* PD2 - PIN2 (input pullup).
|
||||
* PD3 - PIN3 (input pullup).
|
||||
* PD4 - PIN4 (input pullup).
|
||||
* PD5 - PIN5 (input pullup).
|
||||
* PD6 - PIN6 (input pullup).
|
||||
* PD7 - PIN7 (input pullup).
|
||||
* PD8 - PIN8 (input pullup).
|
||||
* PD9 - PIN9 (input pullup).
|
||||
* PD10 - PIN10 (input pullup).
|
||||
* PD11 - PIN11 (input pullup).
|
||||
* PD12 - PIN12 (input pullup).
|
||||
* PD13 - PIN13 (input pullup).
|
||||
* PD14 - PIN14 (input pullup).
|
||||
* PD15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN1) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN7, 0))
|
||||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOE setup:
|
||||
*
|
||||
* PE0 - PIN0 (input pullup).
|
||||
* PE1 - PIN1 (input pullup).
|
||||
* PE2 - PIN2 (input pullup).
|
||||
* PE3 - PIN3 (input pullup).
|
||||
* PE4 - PIN4 (input pullup).
|
||||
* PE5 - PIN5 (input pullup).
|
||||
* PE6 - PIN6 (input pullup).
|
||||
* PE7 - PIN7 (input pullup).
|
||||
* PE8 - PIN8 (input pullup).
|
||||
* PE9 - PIN9 (input pullup).
|
||||
* PE10 - PIN10 (input pullup).
|
||||
* PE11 - PIN11 (input pullup).
|
||||
* PE12 - PIN12 (input pullup).
|
||||
* PE13 - PIN13 (input pullup).
|
||||
* PE14 - PIN14 (input pullup).
|
||||
* PE15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN1) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN7, 0))
|
||||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOF setup:
|
||||
*
|
||||
* PF0 - ARD_D7 (input pullup).
|
||||
* PF1 - ARD_D8 (input pullup).
|
||||
* PF2 - PIN2 (input pullup).
|
||||
* PF3 - PIN3 (input pullup).
|
||||
* PF4 - PIN4 (input pullup).
|
||||
* PF5 - PIN5 (input pullup).
|
||||
* PF6 - PIN6 (input pullup).
|
||||
* PF7 - PIN7 (input pullup).
|
||||
* PF8 - PIN8 (input pullup).
|
||||
* PF9 - PIN9 (input pullup).
|
||||
* PF10 - PIN10 (input pullup).
|
||||
* PF11 - PIN11 (input pullup).
|
||||
* PF12 - PIN12 (input pullup).
|
||||
* PF13 - PIN13 (input pullup).
|
||||
* PF14 - PIN14 (input pullup).
|
||||
* PF15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ARD_D7) | \
|
||||
PIN_MODE_INPUT(GPIOF_ARD_D8) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ARD_D7) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_ARD_D8) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ARD_D7) | \
|
||||
PIN_ODR_HIGH(GPIOF_ARD_D8) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ARD_D7, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_ARD_D8, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN7, 0))
|
||||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN15, 0))
|
||||
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void boardInit(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
@ -0,0 +1,5 @@
|
||||
# List of all the board related files.
|
||||
BOARDSRC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F04/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F04
|
||||
@ -0,0 +1,201 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- STM32F0xx board Template -->
|
||||
<board
|
||||
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
|
||||
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd">
|
||||
<configuration_settings>
|
||||
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
|
||||
<output_path>..</output_path>
|
||||
<hal_version>3.0.x</hal_version>
|
||||
</configuration_settings>
|
||||
<board_name>Clueboard SimonTester</board_name>
|
||||
<board_id>CB_SIMONTESTER</board_id>
|
||||
<board_functions></board_functions>
|
||||
<subtype>STM32F042G</subtype>
|
||||
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
|
||||
LSEBypass="false" LSEDrive="3 High Drive (default)" />
|
||||
<ports>
|
||||
<GPIOA>
|
||||
<pin0
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin1
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin2
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin3
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin4
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin5
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin6
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin7
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin9
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin10
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin13
|
||||
ID="SWDAT"
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Alternate"
|
||||
Alternate="0" />
|
||||
<pin14
|
||||
ID="SWCLK"
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullDown"
|
||||
Level="High"
|
||||
Mode="Alternate"
|
||||
Alternate="0" />
|
||||
<pin15
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
</GPIOA>
|
||||
<GPIOB>
|
||||
<pin0
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin1
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin3
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin4
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin5
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin6
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin7
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
</GPIOB>
|
||||
<GPIOF>
|
||||
<pin0
|
||||
ID="OSC_IN"
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="Floating"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin1
|
||||
ID="OSC_OUT"
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="Floating"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
</GPIOF>
|
||||
</ports>
|
||||
</board>
|
||||
@ -0,0 +1,7 @@
|
||||
/* Address for jumping to bootloader on STM32 chips. */
|
||||
/* It is chip dependent, the correct number can be looked up here:
|
||||
* http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
|
||||
* This also requires a patch to chibios:
|
||||
* <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
|
||||
*/
|
||||
#define STM32_BOOTLOADER_ADDRESS 0x1FFFC400
|
||||
@ -0,0 +1,521 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef CHCONF_H
|
||||
#define CHCONF_H
|
||||
|
||||
#define _CHIBIOS_RT_CONF_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#define CH_CFG_ST_FREQUENCY 10000
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#define CH_CFG_ST_TIMEDELTA 2
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#define CH_CFG_TIME_QUANTUM 0
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
|
||||
/* Use __WFI in the idle thread for waiting. Does lower the power
|
||||
* consumption. */
|
||||
#define CORTEX_ENABLE_WFI_IDLE TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_TM FALSE
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the trace buffer is activated.
|
||||
*
|
||||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
|
||||
|
||||
/**
|
||||
* @brief Trace buffer entries.
|
||||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
/* Idle-enter code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
/* Idle-leave code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* CHCONF_H */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,16 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "clueboard2.h"
|
||||
@ -0,0 +1,26 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#ifndef CLUEBOARD2_H
|
||||
#define CLUEBOARD2_H
|
||||
|
||||
#include "quantum.h"
|
||||
|
||||
// This a shortcut to help you visually see your layout.
|
||||
// The first section contains all of the arguments
|
||||
// The second converts the arguments into a two-dimensional array
|
||||
#define KEYMAP(k00, k01) { { k00, k01 } }
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,139 @@
|
||||
/*
|
||||
* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_H
|
||||
#define CONFIG_H
|
||||
|
||||
#define PREVENT_STUCK_MODIFIERS
|
||||
|
||||
/* USB Device descriptor parameter */
|
||||
#define VENDOR_ID 0xC1ED
|
||||
#define PRODUCT_ID 0x2350
|
||||
#define DEVICE_VER 0x0001
|
||||
#define MANUFACTURER "Clueboard"
|
||||
#define USBSTR_MANUFACTURER 'C', '\x00', 'l', '\x00', 'u', '\x00', 'e', '\x00', 'b', '\x00', 'o', '\x00', 'a', '\x00', 'r', '\x00', 'd', '\x00'
|
||||
#define PRODUCT "Clueboard2"
|
||||
#define USBSTR_PRODUCT 'C', '\x00', 'l', '\x00', 'u', '\x00', 'e', '\x00', 'b', '\x00', 'o', '\x00', 'a', '\x00', 'r', '\x00', 'd', '\x00', '2', '\x00'
|
||||
#define DESCRIPTION A two switch tester
|
||||
|
||||
/* key matrix size */
|
||||
#define MATRIX_ROWS 1
|
||||
#define MATRIX_COLS 2
|
||||
|
||||
/*
|
||||
* Keyboard Matrix Assignments
|
||||
*
|
||||
* Change this to how you wired your keyboard
|
||||
* COLS: AVR pins used for columns, left to right
|
||||
* ROWS: AVR pins used for rows, top to bottom
|
||||
* DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
|
||||
* ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
|
||||
*
|
||||
*/
|
||||
/* Note: These are not used for arm boards. They're here purely as documentation.
|
||||
* #define MATRIX_ROW_PINS { PA7 }
|
||||
* #define MATRIX_COL_PINS { PA5, PA4, PB6, PB3 }
|
||||
* #define UNUSED_PINS
|
||||
*/
|
||||
|
||||
/* COL2ROW, ROW2COL, or CUSTOM_MATRIX */
|
||||
#define DIODE_DIRECTION CUSTOM_MATRIX
|
||||
|
||||
/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
|
||||
#define DEBOUNCE 6
|
||||
|
||||
/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
|
||||
//#define LOCKING_SUPPORT_ENABLE
|
||||
/* Locking resynchronize hack */
|
||||
//#define LOCKING_RESYNC_ENABLE
|
||||
|
||||
/*
|
||||
* Force NKRO
|
||||
*
|
||||
* Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
|
||||
* state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
|
||||
* makefile for this to work.)
|
||||
*
|
||||
* If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
|
||||
* until the next keyboard reset.
|
||||
*
|
||||
* NKRO may prevent your keystrokes from being detected in the BIOS, but it is
|
||||
* fully operational during normal computer usage.
|
||||
*
|
||||
* For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
|
||||
* or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
|
||||
* bootmagic, NKRO mode will always be enabled until it is toggled again during a
|
||||
* power-up.
|
||||
*
|
||||
*/
|
||||
//#define FORCE_NKRO
|
||||
|
||||
/* key combination for magic key command */
|
||||
#define IS_COMMAND() ( \
|
||||
keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
|
||||
)
|
||||
|
||||
/*
|
||||
* Feature disable options
|
||||
* These options are also useful to firmware size reduction.
|
||||
*/
|
||||
|
||||
/* disable debug print */
|
||||
//#define NO_DEBUG
|
||||
|
||||
/* disable print */
|
||||
//#define NO_PRINT
|
||||
|
||||
/* disable action features */
|
||||
//#define NO_ACTION_LAYER
|
||||
//#define NO_ACTION_TAPPING
|
||||
//#define NO_ACTION_ONESHOT
|
||||
//#define NO_ACTION_MACRO
|
||||
//#define NO_ACTION_FUNCTION
|
||||
|
||||
/*
|
||||
* MIDI options
|
||||
*/
|
||||
|
||||
/* Prevent use of disabled MIDI features in the keymap */
|
||||
//#define MIDI_ENABLE_STRICT 1
|
||||
|
||||
/* enable basic MIDI features:
|
||||
- MIDI notes can be sent when in Music mode is on
|
||||
*/
|
||||
//#define MIDI_BASIC
|
||||
|
||||
/* enable advanced MIDI features:
|
||||
- MIDI notes can be added to the keymap
|
||||
- Octave shift and transpose
|
||||
- Virtual sustain, portamento, and modulation wheel
|
||||
- etc.
|
||||
*/
|
||||
//#define MIDI_ADVANCED
|
||||
|
||||
/* override number of MIDI tone keycodes (each octave adds 12 keycodes and allocates 12 bytes) */
|
||||
//#define MIDI_TONE_KEYCODE_OCTAVES 1
|
||||
|
||||
/* Remap PA11->PA9 and PA12->PA10 on STM32 devices that require it.
|
||||
*
|
||||
* The following MCU's are known to require this:
|
||||
*
|
||||
* STM32F042x6
|
||||
*/
|
||||
#define STM32_REMAP_PINS
|
||||
|
||||
#endif
|
||||
File diff suppressed because one or more lines are too long
@ -0,0 +1,350 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 64 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 64 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,67 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "clueboard2.h"
|
||||
#include "printf.h"
|
||||
|
||||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
[0] = KEYMAP(
|
||||
F(0), F(1)
|
||||
),
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM fn_actions[] = {
|
||||
[0] = ACTION_FUNCTION(0),
|
||||
[1] = ACTION_FUNCTION(1),
|
||||
};
|
||||
|
||||
void action_function(keyrecord_t *record, uint8_t id, uint8_t opt) {
|
||||
/* Turn LEDs on and off as the button is pressed.
|
||||
*/
|
||||
if (record->event.pressed) {
|
||||
switch (id) {
|
||||
case 0:
|
||||
palSetPad(GPIOA, 4);
|
||||
break;
|
||||
case 1:
|
||||
palSetPad(GPIOB, 7);
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
switch (id) {
|
||||
case 0:
|
||||
palClearPad(GPIOA, 4);
|
||||
break;
|
||||
case 1:
|
||||
palClearPad(GPIOB, 7);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
switch (id) {
|
||||
case 0:
|
||||
print("Turning backlight off.\n");
|
||||
palClearPad(GPIOA, 4);
|
||||
palClearPad(GPIOB, 7);
|
||||
break;
|
||||
case 1:
|
||||
print("Turning backlight on.\n");
|
||||
palSetPad(GPIOA, 4);
|
||||
palSetPad(GPIOB, 7);
|
||||
break;
|
||||
}
|
||||
*/
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
# The default keymap for simontester
|
||||
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
#include "backlight.h"
|
||||
#include "led.h"
|
||||
#include "printf.h"
|
||||
|
||||
void backlight_init_ports(void) {
|
||||
printf("backlight_init_ports()\n");
|
||||
/*
|
||||
palSetPadMode(GPIOA, 6, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 3, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 15, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 5, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
// Set them high to turn off the LEDs
|
||||
palClearPad(GPIOA, 6);
|
||||
//palSetPad(GPIOA, 6);
|
||||
palSetPad(GPIOA, 3);
|
||||
palSetPad(GPIOA, 15);
|
||||
palSetPad(GPIOB, 5);
|
||||
*/
|
||||
}
|
||||
|
||||
void backlight_set(uint8_t level) {
|
||||
printf("backlight_set(%d)\n", level);
|
||||
/*
|
||||
if (level == 0) {
|
||||
palSetPad(GPIOA, 6);
|
||||
palSetPad(GPIOA, 3);
|
||||
palSetPad(GPIOA, 15);
|
||||
palSetPad(GPIOB, 5);
|
||||
} else {
|
||||
palClearPad(GPIOA, 6);
|
||||
palClearPad(GPIOA, 3);
|
||||
palClearPad(GPIOA, 15);
|
||||
palClearPad(GPIOB, 5);
|
||||
}
|
||||
*/
|
||||
}
|
||||
@ -0,0 +1,95 @@
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <string.h>
|
||||
#include "hal.h"
|
||||
#include "timer.h"
|
||||
#include "wait.h"
|
||||
#include "printf.h"
|
||||
#include "backlight.h"
|
||||
#include "matrix.h"
|
||||
|
||||
|
||||
/* Clueboard2
|
||||
*
|
||||
* Column pins are input with internal pull-down.
|
||||
* Row pins are output and strobe with high.
|
||||
* Key is high or 1 when it turns on.
|
||||
*
|
||||
* col: { PA3, PA2 }
|
||||
* row: { PA1 }
|
||||
*/
|
||||
/* matrix state(1:on, 0:off) */
|
||||
static matrix_row_t matrix[MATRIX_ROWS];
|
||||
static matrix_row_t matrix_debouncing[MATRIX_ROWS];
|
||||
static bool debouncing = false;
|
||||
static uint16_t debouncing_time = 0;
|
||||
|
||||
|
||||
void matrix_init(void) {
|
||||
printf("matrix init\n");
|
||||
//debug_matrix = true;
|
||||
|
||||
/* Column(sense) */
|
||||
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_PULLDOWN);
|
||||
|
||||
/* Row(strobe) */
|
||||
palSetPadMode(GPIOA, 1, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPad(GPIOA, 1); // Only one row, so leave it in strobe state all the time.
|
||||
// I did it this way so hardware hackers would have another
|
||||
// pin to play with.
|
||||
|
||||
memset(matrix, 0, MATRIX_ROWS);
|
||||
memset(matrix_debouncing, 0, MATRIX_ROWS);
|
||||
|
||||
/* Setup the backlight */
|
||||
palSetPadMode(GPIOA, 4, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 7, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
// Set them low to turn off the LEDs
|
||||
palClearPad(GPIOA, 4);
|
||||
palClearPad(GPIOB, 7);
|
||||
}
|
||||
|
||||
uint8_t matrix_scan(void) {
|
||||
matrix_row_t data = 0;
|
||||
|
||||
// read col data: { PA3, PA2 }
|
||||
data = (palReadPad(GPIOA, 3) | (palReadPad(GPIOA, 2) << 1));
|
||||
|
||||
if (matrix_debouncing[0] != data) {
|
||||
matrix_debouncing[0] = data;
|
||||
debouncing = true;
|
||||
debouncing_time = timer_read();
|
||||
}
|
||||
|
||||
if (debouncing && timer_elapsed(debouncing_time) > DEBOUNCE) {
|
||||
matrix[0] = matrix_debouncing[0];
|
||||
debouncing = false;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
bool matrix_is_on(uint8_t row, uint8_t col) {
|
||||
return (matrix[row] & (1<<col));
|
||||
}
|
||||
|
||||
matrix_row_t matrix_get_row(uint8_t row) {
|
||||
return matrix[row];
|
||||
}
|
||||
|
||||
void matrix_print(void) {
|
||||
printf("\nr/c 01234567\n");
|
||||
for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
|
||||
printf("%X0: ", row);
|
||||
matrix_row_t data = matrix_get_row(row);
|
||||
for (int col = 0; col < MATRIX_COLS; col++) {
|
||||
if (data & (1<<col))
|
||||
printf("1");
|
||||
else
|
||||
printf("0");
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,168 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _MCUCONF_H_
|
||||
#define _MCUCONF_H_
|
||||
|
||||
/*
|
||||
* STM32F0xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 3...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#define STM32F0xx_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_HSI_ENABLED TRUE
|
||||
#define STM32_HSI14_ENABLED TRUE
|
||||
#define STM32_HSI48_ENABLED FALSE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
#define STM32_LSE_ENABLED FALSE
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
|
||||
#define STM32_PREDIV_VALUE 1
|
||||
#define STM32_PLLMUL_VALUE 12
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE STM32_PPRE_DIV1
|
||||
#define STM32_ADCSW STM32_ADCSW_HSI14
|
||||
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
||||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
||||
#define STM32_ADCSW STM32_ADCSW_HSI14
|
||||
#define STM32_USBSW STM32_USBSW_HSI48
|
||||
#define STM32_CECSW STM32_CECSW_HSI
|
||||
#define STM32_I2C1SW STM32_I2C1SW_HSI
|
||||
#define STM32_USART1SW STM32_USART1SW_PCLK
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_USE_ADC1 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_IRQ_PRIORITY 2
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
|
||||
|
||||
/*
|
||||
* EXT driver system settings.
|
||||
*/
|
||||
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM14 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM14_IRQ_PRIORITY 2
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 FALSE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 3
|
||||
#define STM32_I2C_USE_DMA TRUE
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 1
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 1
|
||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 3
|
||||
#define STM32_SERIAL_USART2_PRIORITY 3
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define STM32_ST_IRQ_PRIORITY 2
|
||||
#define STM32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 3
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 3
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_USB1 TRUE
|
||||
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
|
||||
#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
|
||||
|
||||
#endif /* _MCUCONF_H_ */
|
||||
@ -0,0 +1,28 @@
|
||||
simontester keyboard firmware
|
||||
======================
|
||||
|
||||
## Quantum MK Firmware
|
||||
|
||||
For the full Quantum feature list, see [the parent readme](/).
|
||||
|
||||
## Building
|
||||
|
||||
Download or clone the whole firmware and navigate to the keyboards/simontester folder. Once your dev env is setup, you'll be able to type `make` to generate your .hex - you can then use the Teensy Loader to program your .hex file.
|
||||
|
||||
Depending on which keymap you would like to use, you will have to compile slightly differently.
|
||||
|
||||
### Default
|
||||
|
||||
To build with the default keymap, simply run `make default`.
|
||||
|
||||
### Other Keymaps
|
||||
|
||||
Several version of keymap are available in advance but you are recommended to define your favorite layout yourself. To define your own keymap create a folder with the name of your keymap in the keymaps folder, and see keymap documentation (you can find in top readme.md) and existant keymap files.
|
||||
|
||||
To build the firmware binary hex file with a keymap just do `make` with a keymap like this:
|
||||
|
||||
```
|
||||
$ make [default|jack|<name>]
|
||||
```
|
||||
|
||||
Keymaps follow the format **__\<name\>.c__** and are stored in the `keymaps` folder.
|
||||
@ -0,0 +1,49 @@
|
||||
# project specific files
|
||||
SRC = matrix.c \
|
||||
led.c
|
||||
|
||||
## chip/board settings
|
||||
# - the next two should match the directories in
|
||||
# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
|
||||
MCU_FAMILY = STM32
|
||||
MCU_SERIES = STM32F0xx
|
||||
|
||||
# Linker script to use
|
||||
# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
|
||||
# or <this_dir>/ld/
|
||||
MCU_LDSCRIPT = STM32F042x6
|
||||
|
||||
# Startup code to use
|
||||
# - it should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/
|
||||
MCU_STARTUP = stm32f0xx
|
||||
|
||||
# Board: it should exist either in <chibios>/os/hal/boards/
|
||||
# or <this_dir>/boards
|
||||
BOARD = GENERIC_STM32_F04
|
||||
|
||||
# Cortex version
|
||||
MCU = cortex-m0
|
||||
|
||||
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
|
||||
ARMV = 6
|
||||
|
||||
# Vector table for application
|
||||
# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
|
||||
# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
|
||||
#OPT_DEFS = -DCORTEX_VTOR_INIT=0x00001000
|
||||
OPT_DEFS =
|
||||
|
||||
# Options to pass to dfu-util when flashing
|
||||
DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000
|
||||
|
||||
# Build Options
|
||||
# comment out to disable the options.
|
||||
#
|
||||
BOOTMAGIC_ENABLE ?= yes # Virtual DIP switch configuration
|
||||
MOUSEKEY_ENABLE ?= yes # Mouse keys
|
||||
EXTRAKEY_ENABLE ?= yes # Audio control and System control
|
||||
CONSOLE_ENABLE ?= yes # Console for debug
|
||||
COMMAND_ENABLE ?= yes # Commands for debug and configuration
|
||||
#SLEEP_LED_ENABLE ?= yes # Breathing sleep LED during USB suspend
|
||||
NKRO_ENABLE ?= yes # USB Nkey Rollover
|
||||
CUSTOM_MATRIX ?= yes # Custom matrix file
|
||||
@ -0,0 +1,18 @@
|
||||
# Copyright 2017 skully <skullydazed@gmail.com>
|
||||
#
|
||||
# This program is free software: you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
ifndef MAKEFILE_INCLUDED
|
||||
include ../../Makefile
|
||||
endif
|
||||
@ -0,0 +1,106 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
*/
|
||||
const PALConfig pal_default_config = {
|
||||
#if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
||||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
|
||||
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
|
||||
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
|
||||
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
|
||||
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
|
||||
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
|
||||
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
|
||||
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
|
||||
stm32_clock_init();
|
||||
}
|
||||
|
||||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief MMC_SPI card detection.
|
||||
*/
|
||||
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
||||
|
||||
(void)mmcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief MMC_SPI card write protection detection.
|
||||
*/
|
||||
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||||
|
||||
(void)mmcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Board-specific initialization code.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
/* Remap PA11->PA9 and PA12->PA10 for USB
|
||||
*/
|
||||
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGCOMPEN;
|
||||
SYSCFG->CFGR1 |= SYSCFG_CFGR1_PA11_PA12_RMP;
|
||||
}
|
||||
@ -0,0 +1,930 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/*
|
||||
* Setup for STMicroelectronics STM32 Nucleo32-F042K6 board.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board identifier.
|
||||
*/
|
||||
#define BOARD_GENERIC_STM32_F04
|
||||
#define BOARD_NAME "Generic STM32F04xx board"
|
||||
|
||||
/*
|
||||
* Board oscillators-related settings.
|
||||
* NOTE: LSE not fitted.
|
||||
* NOTE: HSE not fitted.
|
||||
*/
|
||||
#if !defined(STM32_LSECLK)
|
||||
#define STM32_LSECLK 0U
|
||||
#endif
|
||||
|
||||
#define STM32_LSEDRV (3U << 3U)
|
||||
|
||||
#if !defined(STM32_HSECLK)
|
||||
#define STM32_HSECLK 0U
|
||||
#endif
|
||||
|
||||
/*
|
||||
* MCU type as defined in the ST header.
|
||||
*/
|
||||
#define STM32F042x6
|
||||
|
||||
/*
|
||||
* IO pins assignments.
|
||||
*/
|
||||
#define GPIOA_ARD_A0 0U
|
||||
#define GPIOA_ARD_A1 1U
|
||||
#define GPIOA_VCP_TX 2U
|
||||
#define GPIOA_ARD_A2 3U
|
||||
#define GPIOA_ARD_A3 4U
|
||||
#define GPIOA_ARD_A4 5U
|
||||
#define GPIOA_ARD_A5 6U
|
||||
#define GPIOA_ARD_A6 7U
|
||||
#define GPIOA_ARD_D9 8U
|
||||
#define GPIOA_ARD_D1 9U
|
||||
#define GPIOA_ARD_D0 10U
|
||||
#define GPIOA_ARD_D10 11U
|
||||
#define GPIOA_ARD_D2 12U
|
||||
#define GPIOA_SWDIO 13U
|
||||
#define GPIOA_SWCLK 14U
|
||||
#define GPIOA_VCP_RX 15U
|
||||
|
||||
#define GPIOB_ARD_D3 0U
|
||||
#define GPIOB_ARD_D6 1U
|
||||
#define GPIOB_PIN2 2U
|
||||
#define GPIOB_ARD_D13 3U
|
||||
#define GPIOB_LED_GREEN 3U
|
||||
#define GPIOB_ARD_D12 4U
|
||||
#define GPIOB_ARD_D11 5U
|
||||
#define GPIOB_ARD_D5 6U
|
||||
#define GPIOB_ARD_A5_ALT 6U
|
||||
#define GPIOB_ARD_D4 7U
|
||||
#define GPIOB_ARD_A4_ALT 7U
|
||||
#define GPIOB_PIN8 8U
|
||||
#define GPIOB_PIN9 9U
|
||||
#define GPIOB_PIN10 10U
|
||||
#define GPIOB_PIN11 11U
|
||||
#define GPIOB_PIN12 12U
|
||||
#define GPIOB_PIN13 13U
|
||||
#define GPIOB_PIN14 14U
|
||||
#define GPIOB_PIN15 15U
|
||||
|
||||
#define GPIOC_PIN0 0U
|
||||
#define GPIOC_PIN1 1U
|
||||
#define GPIOC_PIN2 2U
|
||||
#define GPIOC_PIN3 3U
|
||||
#define GPIOC_PIN4 4U
|
||||
#define GPIOC_PIN5 5U
|
||||
#define GPIOC_PIN6 6U
|
||||
#define GPIOC_PIN7 7U
|
||||
#define GPIOC_PIN8 8U
|
||||
#define GPIOC_PIN9 9U
|
||||
#define GPIOC_PIN10 10U
|
||||
#define GPIOC_PIN11 11U
|
||||
#define GPIOC_PIN12 12U
|
||||
#define GPIOC_PIN13 13U
|
||||
#define GPIOC_PIN14 14U
|
||||
#define GPIOC_PIN15 15U
|
||||
|
||||
#define GPIOD_PIN0 0U
|
||||
#define GPIOD_PIN1 1U
|
||||
#define GPIOD_PIN2 2U
|
||||
#define GPIOD_PIN3 3U
|
||||
#define GPIOD_PIN4 4U
|
||||
#define GPIOD_PIN5 5U
|
||||
#define GPIOD_PIN6 6U
|
||||
#define GPIOD_PIN7 7U
|
||||
#define GPIOD_PIN8 8U
|
||||
#define GPIOD_PIN9 9U
|
||||
#define GPIOD_PIN10 10U
|
||||
#define GPIOD_PIN11 11U
|
||||
#define GPIOD_PIN12 12U
|
||||
#define GPIOD_PIN13 13U
|
||||
#define GPIOD_PIN14 14U
|
||||
#define GPIOD_PIN15 15U
|
||||
|
||||
#define GPIOE_PIN0 0U
|
||||
#define GPIOE_PIN1 1U
|
||||
#define GPIOE_PIN2 2U
|
||||
#define GPIOE_PIN3 3U
|
||||
#define GPIOE_PIN4 4U
|
||||
#define GPIOE_PIN5 5U
|
||||
#define GPIOE_PIN6 6U
|
||||
#define GPIOE_PIN7 7U
|
||||
#define GPIOE_PIN8 8U
|
||||
#define GPIOE_PIN9 9U
|
||||
#define GPIOE_PIN10 10U
|
||||
#define GPIOE_PIN11 11U
|
||||
#define GPIOE_PIN12 12U
|
||||
#define GPIOE_PIN13 13U
|
||||
#define GPIOE_PIN14 14U
|
||||
#define GPIOE_PIN15 15U
|
||||
|
||||
#define GPIOF_ARD_D7 0U
|
||||
#define GPIOF_ARD_D8 1U
|
||||
#define GPIOF_PIN2 2U
|
||||
#define GPIOF_PIN3 3U
|
||||
#define GPIOF_PIN4 4U
|
||||
#define GPIOF_PIN5 5U
|
||||
#define GPIOF_PIN6 6U
|
||||
#define GPIOF_PIN7 7U
|
||||
#define GPIOF_PIN8 8U
|
||||
#define GPIOF_PIN9 9U
|
||||
#define GPIOF_PIN10 10U
|
||||
#define GPIOF_PIN11 11U
|
||||
#define GPIOF_PIN12 12U
|
||||
#define GPIOF_PIN13 13U
|
||||
#define GPIOF_PIN14 14U
|
||||
#define GPIOF_PIN15 15U
|
||||
|
||||
/*
|
||||
* IO lines assignments.
|
||||
*/
|
||||
#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U)
|
||||
#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U)
|
||||
#define LINE_VCP_TX PAL_LINE(GPIOA, 2U)
|
||||
#define LINE_ARD_A2 PAL_LINE(GPIOA, 3U)
|
||||
#define LINE_ARD_A3 PAL_LINE(GPIOA, 4U)
|
||||
#define LINE_ARD_A4 PAL_LINE(GPIOA, 5U)
|
||||
#define LINE_ARD_A5 PAL_LINE(GPIOA, 6U)
|
||||
#define LINE_ARD_A6 PAL_LINE(GPIOA, 7U)
|
||||
#define LINE_ARD_D9 PAL_LINE(GPIOA, 8U)
|
||||
#define LINE_ARD_D1 PAL_LINE(GPIOA, 9U)
|
||||
#define LINE_ARD_D0 PAL_LINE(GPIOA, 10U)
|
||||
#define LINE_ARD_D10 PAL_LINE(GPIOA, 11U)
|
||||
#define LINE_ARD_D2 PAL_LINE(GPIOA, 12U)
|
||||
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
|
||||
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
|
||||
#define LINE_VCP_RX PAL_LINE(GPIOA, 15U)
|
||||
|
||||
#define LINE_ARD_D3 PAL_LINE(GPIOB, 0U)
|
||||
#define LINE_ARD_D6 PAL_LINE(GPIOB, 1U)
|
||||
#define LINE_ARD_D13 PAL_LINE(GPIOB, 3U)
|
||||
#define LINE_LED_GREEN PAL_LINE(GPIOB, 3U)
|
||||
#define LINE_ARD_D12 PAL_LINE(GPIOB, 4U)
|
||||
#define LINE_ARD_D11 PAL_LINE(GPIOB, 5U)
|
||||
#define LINE_ARD_D5 PAL_LINE(GPIOB, 6U)
|
||||
#define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U)
|
||||
#define LINE_ARD_D4 PAL_LINE(GPIOB, 7U)
|
||||
#define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U)
|
||||
|
||||
|
||||
|
||||
|
||||
#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U)
|
||||
#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U)
|
||||
|
||||
/*
|
||||
* I/O ports initial setup, this configuration is established soon after reset
|
||||
* in the initialization code.
|
||||
* Please refer to the STM32 Reference Manual for details.
|
||||
*/
|
||||
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
|
||||
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
|
||||
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
|
||||
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
|
||||
#define PIN_ODR_LOW(n) (0U << (n))
|
||||
#define PIN_ODR_HIGH(n) (1U << (n))
|
||||
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
|
||||
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
|
||||
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
|
||||
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
|
||||
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
|
||||
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
|
||||
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
|
||||
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
|
||||
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
|
||||
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
|
||||
|
||||
/*
|
||||
* GPIOA setup:
|
||||
*
|
||||
* PA0 - ARD_A0 (input pullup).
|
||||
* PA1 - ARD_A1 (input pullup).
|
||||
* PA2 - VCP_TX (alternate 1).
|
||||
* PA3 - ARD_A2 (input pullup).
|
||||
* PA4 - ARD_A3 (input pullup).
|
||||
* PA5 - ARD_A4 (input pullup).
|
||||
* PA6 - ARD_A5 (input pullup).
|
||||
* PA7 - ARD_A6 (input pullup).
|
||||
* PA8 - ARD_D9 (input pullup).
|
||||
* PA9 - ARD_D1 (input pullup).
|
||||
* PA10 - ARD_D0 (input pullup).
|
||||
* PA11 - ARD_D10 (input pullup).
|
||||
* PA12 - ARD_D2 (input pullup).
|
||||
* PA13 - SWDIO (alternate 0).
|
||||
* PA14 - SWCLK (alternate 0).
|
||||
* PA15 - VCP_RX (alternate 1).
|
||||
*/
|
||||
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A1) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A2) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A3) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A4) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A5) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_A6) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D9) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D1) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D0) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D10) | \
|
||||
PIN_MODE_INPUT(GPIOA_ARD_D2) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
|
||||
PIN_MODE_ALTERNATE(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \
|
||||
PIN_OSPEED_LOW(GPIOA_VCP_TX) | \
|
||||
PIN_OSPEED_LOW(GPIOA_ARD_A2) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A3) | \
|
||||
PIN_OSPEED_LOW(GPIOA_ARD_A4) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A5) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_A6) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D1) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D0) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
|
||||
PIN_OSPEED_HIGH(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \
|
||||
PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_A6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
|
||||
PIN_PUPDR_FLOATING(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A1) | \
|
||||
PIN_ODR_HIGH(GPIOA_VCP_TX) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A2) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A3) | \
|
||||
PIN_ODR_LOW(GPIOA_ARD_A4) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A5) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_A6) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D9) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D1) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D0) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D10) | \
|
||||
PIN_ODR_HIGH(GPIOA_ARD_D2) | \
|
||||
PIN_ODR_HIGH(GPIOA_SWDIO) | \
|
||||
PIN_ODR_HIGH(GPIOA_SWCLK) | \
|
||||
PIN_ODR_HIGH(GPIOA_VCP_RX))
|
||||
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A1, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_VCP_TX, 1) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A2, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A3, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A4, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A5, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_A6, 0))
|
||||
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D1, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D0, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D10, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_ARD_D2, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
|
||||
PIN_AFIO_AF(GPIOA_VCP_RX, 1))
|
||||
|
||||
/*
|
||||
* GPIOB setup:
|
||||
*
|
||||
* PB0 - ARD_D3 (input pullup).
|
||||
* PB1 - ARD_D6 (input pullup).
|
||||
* PB2 - PIN2 (input pullup).
|
||||
* PB3 - ARD_D13 LED_GREEN (output pushpull maximum).
|
||||
* PB4 - ARD_D12 (input pullup).
|
||||
* PB5 - ARD_D11 (input pullup).
|
||||
* PB6 - ARD_D5 ARD_A5_ALT (input pullup).
|
||||
* PB7 - ARD_D4 ARD_A4_ALT (input pullup).
|
||||
* PB8 - PIN8 (input pullup).
|
||||
* PB9 - PIN9 (input pullup).
|
||||
* PB10 - PIN10 (input pullup).
|
||||
* PB11 - PIN11 (input pullup).
|
||||
* PB12 - PIN12 (input pullup).
|
||||
* PB13 - PIN13 (input pullup).
|
||||
* PB14 - PIN14 (input pullup).
|
||||
* PB15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D6) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN2) | \
|
||||
PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D12) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D11) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D5) | \
|
||||
PIN_MODE_INPUT(GPIOB_ARD_D4) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D11) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
||||
PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D6) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN2) | \
|
||||
PIN_ODR_LOW(GPIOB_ARD_D13) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D12) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D11) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D5) | \
|
||||
PIN_ODR_HIGH(GPIOB_ARD_D4) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_D3, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D6, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D13, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D12, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D11, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D5, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_ARD_D4, 0))
|
||||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOC setup:
|
||||
*
|
||||
* PC0 - PIN0 (input pullup).
|
||||
* PC1 - PIN1 (input pullup).
|
||||
* PC2 - PIN2 (input pullup).
|
||||
* PC3 - PIN3 (input pullup).
|
||||
* PC4 - PIN4 (input pullup).
|
||||
* PC5 - PIN5 (input pullup).
|
||||
* PC6 - PIN6 (input pullup).
|
||||
* PC7 - PIN7 (input pullup).
|
||||
* PC8 - PIN8 (input pullup).
|
||||
* PC9 - PIN9 (input pullup).
|
||||
* PC10 - PIN10 (input pullup).
|
||||
* PC11 - PIN11 (input pullup).
|
||||
* PC12 - PIN12 (input pullup).
|
||||
* PC13 - PIN13 (input pullup).
|
||||
* PC14 - PIN14 (input pullup).
|
||||
* PC15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN1) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN7, 0))
|
||||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOD setup:
|
||||
*
|
||||
* PD0 - PIN0 (input pullup).
|
||||
* PD1 - PIN1 (input pullup).
|
||||
* PD2 - PIN2 (input pullup).
|
||||
* PD3 - PIN3 (input pullup).
|
||||
* PD4 - PIN4 (input pullup).
|
||||
* PD5 - PIN5 (input pullup).
|
||||
* PD6 - PIN6 (input pullup).
|
||||
* PD7 - PIN7 (input pullup).
|
||||
* PD8 - PIN8 (input pullup).
|
||||
* PD9 - PIN9 (input pullup).
|
||||
* PD10 - PIN10 (input pullup).
|
||||
* PD11 - PIN11 (input pullup).
|
||||
* PD12 - PIN12 (input pullup).
|
||||
* PD13 - PIN13 (input pullup).
|
||||
* PD14 - PIN14 (input pullup).
|
||||
* PD15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN1) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOD_PIN15))
|
||||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN7, 0))
|
||||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOE setup:
|
||||
*
|
||||
* PE0 - PIN0 (input pullup).
|
||||
* PE1 - PIN1 (input pullup).
|
||||
* PE2 - PIN2 (input pullup).
|
||||
* PE3 - PIN3 (input pullup).
|
||||
* PE4 - PIN4 (input pullup).
|
||||
* PE5 - PIN5 (input pullup).
|
||||
* PE6 - PIN6 (input pullup).
|
||||
* PE7 - PIN7 (input pullup).
|
||||
* PE8 - PIN8 (input pullup).
|
||||
* PE9 - PIN9 (input pullup).
|
||||
* PE10 - PIN10 (input pullup).
|
||||
* PE11 - PIN11 (input pullup).
|
||||
* PE12 - PIN12 (input pullup).
|
||||
* PE13 - PIN13 (input pullup).
|
||||
* PE14 - PIN14 (input pullup).
|
||||
* PE15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN1) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN7, 0))
|
||||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN15, 0))
|
||||
|
||||
/*
|
||||
* GPIOF setup:
|
||||
*
|
||||
* PF0 - ARD_D7 (input pullup).
|
||||
* PF1 - ARD_D8 (input pullup).
|
||||
* PF2 - PIN2 (input pullup).
|
||||
* PF3 - PIN3 (input pullup).
|
||||
* PF4 - PIN4 (input pullup).
|
||||
* PF5 - PIN5 (input pullup).
|
||||
* PF6 - PIN6 (input pullup).
|
||||
* PF7 - PIN7 (input pullup).
|
||||
* PF8 - PIN8 (input pullup).
|
||||
* PF9 - PIN9 (input pullup).
|
||||
* PF10 - PIN10 (input pullup).
|
||||
* PF11 - PIN11 (input pullup).
|
||||
* PF12 - PIN12 (input pullup).
|
||||
* PF13 - PIN13 (input pullup).
|
||||
* PF14 - PIN14 (input pullup).
|
||||
* PF15 - PIN15 (input pullup).
|
||||
*/
|
||||
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ARD_D7) | \
|
||||
PIN_MODE_INPUT(GPIOF_ARD_D8) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN2) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN6) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN7) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN8) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN9) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN10) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN11) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN12) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN13) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN14) | \
|
||||
PIN_MODE_INPUT(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ARD_D7) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_ARD_D8) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
|
||||
PIN_PUPDR_PULLUP(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ARD_D7) | \
|
||||
PIN_ODR_HIGH(GPIOF_ARD_D8) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN2) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN3) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN4) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN5) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN6) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN7) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN8) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN9) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN10) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN11) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN12) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ARD_D7, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_ARD_D8, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN7, 0))
|
||||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN15, 0))
|
||||
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void boardInit(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
@ -0,0 +1,5 @@
|
||||
# List of all the board related files.
|
||||
BOARDSRC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F04/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F04
|
||||
@ -0,0 +1,201 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- STM32F0xx board Template -->
|
||||
<board
|
||||
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
|
||||
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd">
|
||||
<configuration_settings>
|
||||
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
|
||||
<output_path>..</output_path>
|
||||
<hal_version>3.0.x</hal_version>
|
||||
</configuration_settings>
|
||||
<board_name>Clueboard4</board_name>
|
||||
<board_id>CLUEBOARD4</board_id>
|
||||
<board_functions></board_functions>
|
||||
<subtype>STM32F042G</subtype>
|
||||
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
|
||||
LSEBypass="false" LSEDrive="3 High Drive (default)" />
|
||||
<ports>
|
||||
<GPIOA>
|
||||
<pin0
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin1
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin2
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin3
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin4
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin5
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin6
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin7
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin9
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin10
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin13
|
||||
ID="SWDAT"
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Alternate"
|
||||
Alternate="0" />
|
||||
<pin14
|
||||
ID="SWCLK"
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullDown"
|
||||
Level="High"
|
||||
Mode="Alternate"
|
||||
Alternate="0" />
|
||||
<pin15
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
</GPIOA>
|
||||
<GPIOB>
|
||||
<pin0
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin1
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin3
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin4
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Maximum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin5
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin6
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin7
|
||||
ID=""
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="PullUp"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
</GPIOB>
|
||||
<GPIOF>
|
||||
<pin0
|
||||
ID="OSC_IN"
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="Floating"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
<pin1
|
||||
ID="OSC_OUT"
|
||||
Type="PushPull"
|
||||
Speed="Minimum"
|
||||
Resistor="Floating"
|
||||
Level="High"
|
||||
Mode="Input"
|
||||
Alternate="0" />
|
||||
</GPIOF>
|
||||
</ports>
|
||||
</board>
|
||||
@ -0,0 +1,7 @@
|
||||
/* Address for jumping to bootloader on STM32 chips. */
|
||||
/* It is chip dependent, the correct number can be looked up here:
|
||||
* http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
|
||||
* This also requires a patch to chibios:
|
||||
* <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
|
||||
*/
|
||||
#define STM32_BOOTLOADER_ADDRESS 0x1FFFC400
|
||||
@ -0,0 +1,521 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef CHCONF_H
|
||||
#define CHCONF_H
|
||||
|
||||
#define _CHIBIOS_RT_CONF_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#define CH_CFG_ST_FREQUENCY 10000
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#define CH_CFG_ST_TIMEDELTA 2
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#define CH_CFG_TIME_QUANTUM 0
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
|
||||
/* Use __WFI in the idle thread for waiting. Does lower the power
|
||||
* consumption. */
|
||||
#define CORTEX_ENABLE_WFI_IDLE TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_TM FALSE
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the trace buffer is activated.
|
||||
*
|
||||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
|
||||
|
||||
/**
|
||||
* @brief Trace buffer entries.
|
||||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
/* Idle-enter code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
/* Idle-leave code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* CHCONF_H */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,16 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "clueboard4.h"
|
||||
@ -0,0 +1,31 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#ifndef CLUEBOARD4_H
|
||||
#define CLUEBOARD4_H
|
||||
|
||||
#include "quantum.h"
|
||||
|
||||
// This a shortcut to help you visually see your layout.
|
||||
// The first section contains all of the arguments
|
||||
// The second converts the arguments into a two-dimensional array
|
||||
#define KEYMAP(\
|
||||
k00, k03, \
|
||||
k01, k02 \
|
||||
) { { \
|
||||
k00, k01, k02, k03, \
|
||||
}, }
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,139 @@
|
||||
/*
|
||||
* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_H
|
||||
#define CONFIG_H
|
||||
|
||||
#define PREVENT_STUCK_MODIFIERS
|
||||
|
||||
/* USB Device descriptor parameter */
|
||||
#define VENDOR_ID 0xC1ED
|
||||
#define PRODUCT_ID 0x2340
|
||||
#define DEVICE_VER 0x0001
|
||||
#define MANUFACTURER "Clueboard"
|
||||
#define USBSTR_MANUFACTURER 'C', '\x00', 'l', '\x00', 'u', '\x00', 'e', '\x00', 'b', '\x00', 'o', '\x00', 'a', '\x00', 'r', '\x00', 'd', '\x00'
|
||||
#define PRODUCT "Simon Tester"
|
||||
#define USBSTR_PRODUCT 'S', '\x00', 'i', '\x00', 'm', '\x00', 'o', '\x00', 'n', '\x00', ' ', '\x00', 'T', '\x00', 'e', '\x00', 's', '\x00', 't', '\x00', 'e', '\x00', 'r', '\x00'
|
||||
#define DESCRIPTION A switch tester that plays Simon
|
||||
|
||||
/* key matrix size */
|
||||
#define MATRIX_ROWS 1
|
||||
#define MATRIX_COLS 4
|
||||
|
||||
/*
|
||||
* Keyboard Matrix Assignments
|
||||
*
|
||||
* Change this to how you wired your keyboard
|
||||
* COLS: AVR pins used for columns, left to right
|
||||
* ROWS: AVR pins used for rows, top to bottom
|
||||
* DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
|
||||
* ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
|
||||
*
|
||||
*/
|
||||
/* Note: These are not used for arm boards. They're here purely as documentation.
|
||||
* #define MATRIX_ROW_PINS { PA7 }
|
||||
* #define MATRIX_COL_PINS { PA5, PA4, PB6, PB3 }
|
||||
* #define UNUSED_PINS
|
||||
*/
|
||||
|
||||
/* COL2ROW, ROW2COL, or CUSTOM_MATRIX */
|
||||
#define DIODE_DIRECTION CUSTOM_MATRIX
|
||||
|
||||
/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
|
||||
#define DEBOUNCE 6
|
||||
|
||||
/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
|
||||
//#define LOCKING_SUPPORT_ENABLE
|
||||
/* Locking resynchronize hack */
|
||||
//#define LOCKING_RESYNC_ENABLE
|
||||
|
||||
/*
|
||||
* Force NKRO
|
||||
*
|
||||
* Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
|
||||
* state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
|
||||
* makefile for this to work.)
|
||||
*
|
||||
* If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
|
||||
* until the next keyboard reset.
|
||||
*
|
||||
* NKRO may prevent your keystrokes from being detected in the BIOS, but it is
|
||||
* fully operational during normal computer usage.
|
||||
*
|
||||
* For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
|
||||
* or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
|
||||
* bootmagic, NKRO mode will always be enabled until it is toggled again during a
|
||||
* power-up.
|
||||
*
|
||||
*/
|
||||
//#define FORCE_NKRO
|
||||
|
||||
/* key combination for magic key command */
|
||||
#define IS_COMMAND() ( \
|
||||
keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
|
||||
)
|
||||
|
||||
/*
|
||||
* Feature disable options
|
||||
* These options are also useful to firmware size reduction.
|
||||
*/
|
||||
|
||||
/* disable debug print */
|
||||
//#define NO_DEBUG
|
||||
|
||||
/* disable print */
|
||||
//#define NO_PRINT
|
||||
|
||||
/* disable action features */
|
||||
//#define NO_ACTION_LAYER
|
||||
//#define NO_ACTION_TAPPING
|
||||
//#define NO_ACTION_ONESHOT
|
||||
//#define NO_ACTION_MACRO
|
||||
//#define NO_ACTION_FUNCTION
|
||||
|
||||
/*
|
||||
* MIDI options
|
||||
*/
|
||||
|
||||
/* Prevent use of disabled MIDI features in the keymap */
|
||||
//#define MIDI_ENABLE_STRICT 1
|
||||
|
||||
/* enable basic MIDI features:
|
||||
- MIDI notes can be sent when in Music mode is on
|
||||
*/
|
||||
//#define MIDI_BASIC
|
||||
|
||||
/* enable advanced MIDI features:
|
||||
- MIDI notes can be added to the keymap
|
||||
- Octave shift and transpose
|
||||
- Virtual sustain, portamento, and modulation wheel
|
||||
- etc.
|
||||
*/
|
||||
//#define MIDI_ADVANCED
|
||||
|
||||
/* override number of MIDI tone keycodes (each octave adds 12 keycodes and allocates 12 bytes) */
|
||||
//#define MIDI_TONE_KEYCODE_OCTAVES 1
|
||||
|
||||
/* Remap PA11->PA9 and PA12->PA10 on STM32 devices that require it.
|
||||
*
|
||||
* The following MCU's are known to require this:
|
||||
*
|
||||
* STM32F042x6
|
||||
*/
|
||||
#define STM32_REMAP_PINS
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,350 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 64 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 64 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,52 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "clueboard4.h"
|
||||
#include "printf.h"
|
||||
|
||||
const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
[0] = KEYMAP(
|
||||
KC_1, KC_2, \
|
||||
F(0), F(1) \
|
||||
),
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM fn_actions[] = {
|
||||
[0] = ACTION_FUNCTION(0),
|
||||
[1] = ACTION_FUNCTION(1),
|
||||
};
|
||||
|
||||
void action_function(keyrecord_t *record, uint8_t id, uint8_t opt) {
|
||||
if (!record->event.pressed) {
|
||||
return;
|
||||
}
|
||||
|
||||
switch (id) {
|
||||
case 0:
|
||||
print("Turning backlight off.\n");
|
||||
palSetPad(GPIOA, 6);
|
||||
palSetPad(GPIOA, 3);
|
||||
palSetPad(GPIOA, 15);
|
||||
palSetPad(GPIOB, 5);
|
||||
break;
|
||||
case 1:
|
||||
print("Turning backlight on.\n");
|
||||
palClearPad(GPIOA, 6);
|
||||
palClearPad(GPIOA, 3);
|
||||
palClearPad(GPIOA, 15);
|
||||
palClearPad(GPIOB, 5);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
# The default keymap for clueboard4
|
||||
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
#include "backlight.h"
|
||||
#include "led.h"
|
||||
#include "printf.h"
|
||||
|
||||
void backlight_init_ports(void) {
|
||||
printf("backlight_init_ports()\n");
|
||||
/*
|
||||
palSetPadMode(GPIOA, 6, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 3, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 15, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 5, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
// Set them high to turn off the LEDs
|
||||
palClearPad(GPIOA, 6);
|
||||
//palSetPad(GPIOA, 6);
|
||||
palSetPad(GPIOA, 3);
|
||||
palSetPad(GPIOA, 15);
|
||||
palSetPad(GPIOB, 5);
|
||||
*/
|
||||
}
|
||||
|
||||
void backlight_set(uint8_t level) {
|
||||
printf("backlight_set(%d)\n", level);
|
||||
/*
|
||||
if (level == 0) {
|
||||
palSetPad(GPIOA, 6);
|
||||
palSetPad(GPIOA, 3);
|
||||
palSetPad(GPIOA, 15);
|
||||
palSetPad(GPIOB, 5);
|
||||
} else {
|
||||
palClearPad(GPIOA, 6);
|
||||
palClearPad(GPIOA, 3);
|
||||
palClearPad(GPIOA, 15);
|
||||
palClearPad(GPIOB, 5);
|
||||
}
|
||||
*/
|
||||
}
|
||||
@ -0,0 +1,104 @@
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <string.h>
|
||||
#include "hal.h"
|
||||
#include "timer.h"
|
||||
#include "wait.h"
|
||||
#include "printf.h"
|
||||
#include "backlight.h"
|
||||
#include "matrix.h"
|
||||
|
||||
|
||||
/* Clueboard4
|
||||
*
|
||||
* Column pins are input with internal pull-down.
|
||||
* Row pins are output and strobe with high.
|
||||
* Key is high or 1 when it turns on.
|
||||
*
|
||||
* col: { PA5, PA4, PB6, PB3 }
|
||||
* row: { PA7 }
|
||||
*/
|
||||
/* matrix state(1:on, 0:off) */
|
||||
static matrix_row_t matrix[MATRIX_ROWS];
|
||||
static matrix_row_t matrix_debouncing[MATRIX_ROWS];
|
||||
static bool debouncing = false;
|
||||
static uint16_t debouncing_time = 0;
|
||||
|
||||
|
||||
void matrix_init(void) {
|
||||
printf("matrix init\n");
|
||||
//debug_matrix = true;
|
||||
|
||||
/* Column(sense) */
|
||||
palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOB, 6, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOB, 3, PAL_MODE_INPUT_PULLDOWN);
|
||||
|
||||
/* Row(strobe) */
|
||||
palSetPadMode(GPIOA, 7, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPad(GPIOA, 7); // Only one row, so leave it in strobe state all the time.
|
||||
// I did it this way so hardware hackers would have another
|
||||
// pin to play with.
|
||||
|
||||
memset(matrix, 0, MATRIX_ROWS);
|
||||
memset(matrix_debouncing, 0, MATRIX_ROWS);
|
||||
|
||||
/* Setup the backlight */
|
||||
palSetPadMode(GPIOA, 6, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 3, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 15, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 5, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
// Set them high to turn off the LEDs
|
||||
palClearPad(GPIOA, 6);
|
||||
palSetPad(GPIOA, 3);
|
||||
palSetPad(GPIOA, 15);
|
||||
palSetPad(GPIOB, 5);
|
||||
}
|
||||
|
||||
uint8_t matrix_scan(void) {
|
||||
matrix_row_t data = 0;
|
||||
|
||||
// read col data: { PA5, PA4, PB6, PB3 }
|
||||
data = (palReadPad(GPIOA, 5) |
|
||||
(palReadPad(GPIOA, 4) << 1) |
|
||||
(palReadPad(GPIOB, 6) << 2) |
|
||||
(palReadPad(GPIOB, 3) << 3));
|
||||
|
||||
if (matrix_debouncing[0] != data) {
|
||||
matrix_debouncing[0] = data;
|
||||
debouncing = true;
|
||||
debouncing_time = timer_read();
|
||||
}
|
||||
|
||||
if (debouncing && timer_elapsed(debouncing_time) > DEBOUNCE) {
|
||||
matrix[0] = matrix_debouncing[0];
|
||||
debouncing = false;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
bool matrix_is_on(uint8_t row, uint8_t col) {
|
||||
return (matrix[row] & (1<<col));
|
||||
}
|
||||
|
||||
matrix_row_t matrix_get_row(uint8_t row) {
|
||||
return matrix[row];
|
||||
}
|
||||
|
||||
void matrix_print(void) {
|
||||
printf("\nr/c 01234567\n");
|
||||
for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
|
||||
printf("%X0: ", row);
|
||||
matrix_row_t data = matrix_get_row(row);
|
||||
for (int col = 0; col < MATRIX_COLS; col++) {
|
||||
if (data & (1<<col))
|
||||
printf("1");
|
||||
else
|
||||
printf("0");
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,168 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _MCUCONF_H_
|
||||
#define _MCUCONF_H_
|
||||
|
||||
/*
|
||||
* STM32F0xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 3...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#define STM32F0xx_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_HSI_ENABLED TRUE
|
||||
#define STM32_HSI14_ENABLED TRUE
|
||||
#define STM32_HSI48_ENABLED FALSE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
#define STM32_LSE_ENABLED FALSE
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
|
||||
#define STM32_PREDIV_VALUE 1
|
||||
#define STM32_PLLMUL_VALUE 12
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE STM32_PPRE_DIV1
|
||||
#define STM32_ADCSW STM32_ADCSW_HSI14
|
||||
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
||||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||
#define STM32_ADCPRE STM32_ADCPRE_DIV4
|
||||
#define STM32_ADCSW STM32_ADCSW_HSI14
|
||||
#define STM32_USBSW STM32_USBSW_HSI48
|
||||
#define STM32_CECSW STM32_CECSW_HSI
|
||||
#define STM32_I2C1SW STM32_I2C1SW_HSI
|
||||
#define STM32_USART1SW STM32_USART1SW_PCLK
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_USE_ADC1 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_IRQ_PRIORITY 2
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
|
||||
|
||||
/*
|
||||
* EXT driver system settings.
|
||||
*/
|
||||
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
|
||||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM14 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM14_IRQ_PRIORITY 2
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 FALSE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 3
|
||||
#define STM32_I2C_USE_DMA TRUE
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 1
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 1
|
||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 3
|
||||
#define STM32_SERIAL_USART2_PRIORITY 3
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define STM32_ST_IRQ_PRIORITY 2
|
||||
#define STM32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 3
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 3
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_USB1 TRUE
|
||||
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
|
||||
#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
|
||||
|
||||
#endif /* _MCUCONF_H_ */
|
||||
@ -0,0 +1,28 @@
|
||||
clueboard4 keyboard firmware
|
||||
============================
|
||||
|
||||
## Quantum MK Firmware
|
||||
|
||||
For the full Quantum feature list, see [the parent readme](/).
|
||||
|
||||
## Building
|
||||
|
||||
Download or clone the whole firmware and navigate to the keyboards/clueboard4 folder. Once your dev env is setup, you'll be able to type `make` to generate your .hex - you can then use the Teensy Loader to program your .hex file.
|
||||
|
||||
Depending on which keymap you would like to use, you will have to compile slightly differently.
|
||||
|
||||
### Default
|
||||
|
||||
To build with the default keymap, simply run `make default`.
|
||||
|
||||
### Other Keymaps
|
||||
|
||||
Several version of keymap are available in advance but you are recommended to define your favorite layout yourself. To define your own keymap create a folder with the name of your keymap in the keymaps folder, and see keymap documentation (you can find in top readme.md) and existant keymap files.
|
||||
|
||||
To build the firmware binary hex file with a keymap just do `make` with a keymap like this:
|
||||
|
||||
```
|
||||
$ make [default|jack|<name>]
|
||||
```
|
||||
|
||||
Keymaps follow the format **__\<name\>.c__** and are stored in the `keymaps` folder.
|
||||
@ -0,0 +1,49 @@
|
||||
# project specific files
|
||||
SRC = matrix.c \
|
||||
led.c
|
||||
|
||||
## chip/board settings
|
||||
# - the next two should match the directories in
|
||||
# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
|
||||
MCU_FAMILY = STM32
|
||||
MCU_SERIES = STM32F0xx
|
||||
|
||||
# Linker script to use
|
||||
# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
|
||||
# or <this_dir>/ld/
|
||||
MCU_LDSCRIPT = STM32F042x6
|
||||
|
||||
# Startup code to use
|
||||
# - it should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/
|
||||
MCU_STARTUP = stm32f0xx
|
||||
|
||||
# Board: it should exist either in <chibios>/os/hal/boards/
|
||||
# or <this_dir>/boards
|
||||
BOARD = GENERIC_STM32_F04
|
||||
|
||||
# Cortex version
|
||||
MCU = cortex-m0
|
||||
|
||||
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
|
||||
ARMV = 6
|
||||
|
||||
# Vector table for application
|
||||
# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
|
||||
# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
|
||||
#OPT_DEFS = -DCORTEX_VTOR_INIT=0x00001000
|
||||
OPT_DEFS =
|
||||
|
||||
# Options to pass to dfu-util when flashing
|
||||
DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000
|
||||
|
||||
# Build Options
|
||||
# comment out to disable the options.
|
||||
#
|
||||
BOOTMAGIC_ENABLE ?= yes # Virtual DIP switch configuration
|
||||
MOUSEKEY_ENABLE ?= yes # Mouse keys
|
||||
EXTRAKEY_ENABLE ?= yes # Audio control and System control
|
||||
CONSOLE_ENABLE ?= yes # Console for debug
|
||||
COMMAND_ENABLE ?= yes # Commands for debug and configuration
|
||||
#SLEEP_LED_ENABLE ?= yes # Breathing sleep LED during USB suspend
|
||||
NKRO_ENABLE ?= yes # USB Nkey Rollover
|
||||
CUSTOM_MATRIX ?= yes # Custom matrix file
|
||||
@ -0,0 +1,18 @@
|
||||
# Copyright 2017 skully <skullydazed@gmail.com>
|
||||
#
|
||||
# This program is free software: you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
ifndef MAKEFILE_INCLUDED
|
||||
include ../../Makefile
|
||||
endif
|
||||
@ -0,0 +1,7 @@
|
||||
/* Address for jumping to bootloader on STM32 chips. */
|
||||
/* It is chip dependent, the correct number can be looked up here:
|
||||
* http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
|
||||
* This also requires a patch to chibios:
|
||||
* <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
|
||||
*/
|
||||
#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800
|
||||
@ -0,0 +1,520 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef CHCONF_H
|
||||
#define CHCONF_H
|
||||
|
||||
#define _CHIBIOS_RT_CONF_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#define CH_CFG_ST_FREQUENCY 10000
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#define CH_CFG_ST_TIMEDELTA 2
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#define CH_CFG_TIME_QUANTUM 0
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_TM TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY TRUE
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the trace buffer is activated.
|
||||
*
|
||||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
|
||||
|
||||
/**
|
||||
* @brief Trace buffer entries.
|
||||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_STACK_CHECK TRUE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
/* Idle-enter code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
/* Idle-leave code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* CHCONF_H */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,24 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "clueboard60.h"
|
||||
|
||||
void matrix_init_kb(void) {
|
||||
|
||||
}
|
||||
|
||||
void matrix_scan_kb(void) {
|
||||
|
||||
}
|
||||
@ -0,0 +1,42 @@
|
||||
/* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#ifndef CLUEBOARD60_H
|
||||
#define CLUEBOARD60_H
|
||||
|
||||
#include "quantum.h"
|
||||
|
||||
/*
|
||||
* This a shortcut to help you visually see your layout.
|
||||
* The first section contains all of the arguments. We've arranged it into a
|
||||
* vaguely 60% layout to help visualization.
|
||||
* The second converts the arguments into a two-dimensional array representing the
|
||||
* physical matrix.
|
||||
*/
|
||||
#define KEYMAP(\
|
||||
k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e, \
|
||||
k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, \
|
||||
k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2e, \
|
||||
k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, k3e, \
|
||||
k40, k41, k42, k47, k4a, k4b, k4c, k4e \
|
||||
) { \
|
||||
{ k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e, }, \
|
||||
{ k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, KC_NO, k1e, }, \
|
||||
{ k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, KC_NO, k2e, }, \
|
||||
{ k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, KC_NO, k3e, }, \
|
||||
{ k40, k41, k42, KC_NO, KC_NO, KC_NO, KC_NO, k47, KC_NO, KC_NO, k4a, k4b, k4c, KC_NO, k4e, }, \
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,136 @@
|
||||
/*
|
||||
* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_H
|
||||
#define CONFIG_H
|
||||
|
||||
#define PREVENT_STUCK_MODIFIERS
|
||||
|
||||
/* USB Device descriptor parameter */
|
||||
#define VENDOR_ID 0xC1ED
|
||||
#define PRODUCT_ID 0x2350
|
||||
#define DEVICE_VER 0x0001
|
||||
#define MANUFACTURER "Clueboard"
|
||||
#define USBSTR_MANUFACTURER 'C', '\x00', 'l', '\x00', 'u', '\x00', 'e', '\x00', 'b', '\x00', 'o', '\x00', 'a', '\x00', 'r', '\x00', 'd', '\x00'
|
||||
#define PRODUCT "Clueboard60"
|
||||
#define USBSTR_PRODUCT 'C', '\x00', 'l', '\x00', 'u', '\x00', 'e', '\x00', 'b', '\x00', 'o', '\x00', 'a', '\x00', 'r', '\x00', 'd', '\x00', ' ', '\x00', '6', '\x00', '0', '\x00', '%', '\x00'
|
||||
#define DESCRIPTION "Clueboard 60%"
|
||||
|
||||
/* key matrix size */
|
||||
#define MATRIX_ROWS 5
|
||||
#define MATRIX_COLS 15
|
||||
|
||||
/*
|
||||
* Keyboard Matrix Assignments
|
||||
*
|
||||
* Change this to how you wired your keyboard
|
||||
* COLS: AVR pins used for columns, left to right
|
||||
* ROWS: AVR pins used for rows, top to bottom
|
||||
* DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
|
||||
* ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
|
||||
*
|
||||
*/
|
||||
/* Note: These are not used for arm boards. They're here purely as documentation.
|
||||
* #define MATRIX_ROW_PINS { PB0, PB1, PB2, PA15, PA10 }
|
||||
* #define MATRIX_COL_PINS { PA2, PA3, PA6, PB14, PB15, PA8, PA9, PA7, PB3, PB4, PC14, PC15, PC13, PB5, PB6 }
|
||||
* #define UNUSED_PINS
|
||||
*/
|
||||
|
||||
/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
|
||||
#define DEBOUNCE 6
|
||||
|
||||
/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
|
||||
//#define LOCKING_SUPPORT_ENABLE
|
||||
/* Locking resynchronize hack */
|
||||
//#define LOCKING_RESYNC_ENABLE
|
||||
|
||||
/*
|
||||
* Force NKRO
|
||||
*
|
||||
* Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
|
||||
* state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
|
||||
* makefile for this to work.)
|
||||
*
|
||||
* If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
|
||||
* until the next keyboard reset.
|
||||
*
|
||||
* NKRO may prevent your keystrokes from being detected in the BIOS, but it is
|
||||
* fully operational during normal computer usage.
|
||||
*
|
||||
* For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
|
||||
* or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
|
||||
* bootmagic, NKRO mode will always be enabled until it is toggled again during a
|
||||
* power-up.
|
||||
*
|
||||
*/
|
||||
//#define FORCE_NKRO
|
||||
|
||||
/* key combination for magic key command */
|
||||
#define IS_COMMAND() ( \
|
||||
keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
|
||||
)
|
||||
|
||||
/*
|
||||
* Feature disable options
|
||||
* These options are also useful to firmware size reduction.
|
||||
*/
|
||||
|
||||
/* disable debug print */
|
||||
//#define NO_DEBUG
|
||||
|
||||
/* disable print */
|
||||
//#define NO_PRINT
|
||||
|
||||
/* disable action features */
|
||||
//#define NO_ACTION_LAYER
|
||||
//#define NO_ACTION_TAPPING
|
||||
//#define NO_ACTION_ONESHOT
|
||||
//#define NO_ACTION_MACRO
|
||||
//#define NO_ACTION_FUNCTION
|
||||
|
||||
/*
|
||||
* MIDI options
|
||||
*/
|
||||
|
||||
/* Prevent use of disabled MIDI features in the keymap */
|
||||
//#define MIDI_ENABLE_STRICT 1
|
||||
|
||||
/* enable basic MIDI features:
|
||||
- MIDI notes can be sent when in Music mode is on
|
||||
*/
|
||||
//#define MIDI_BASIC
|
||||
|
||||
/* enable advanced MIDI features:
|
||||
- MIDI notes can be added to the keymap
|
||||
- Octave shift and transpose
|
||||
- Virtual sustain, portamento, and modulation wheel
|
||||
- etc.
|
||||
*/
|
||||
//#define MIDI_ADVANCED
|
||||
|
||||
/* override number of MIDI tone keycodes (each octave adds 12 keycodes and allocates 12 bytes) */
|
||||
//#define MIDI_TONE_KEYCODE_OCTAVES 1
|
||||
|
||||
/* Remap PA11->PA9 and PA12->PA10 on STM32 devices that require it.
|
||||
*
|
||||
* The following MCU's are known to require this:
|
||||
*
|
||||
* STM32F042x6
|
||||
*/
|
||||
// #define STM32_REMAP_PINS
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,388 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HALCONF_H
|
||||
#define HALCONF_H
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the QSPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_QSPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
#endif /* HALCONF_H */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,31 @@
|
||||
#include "clueboard60.h"
|
||||
|
||||
#define _______ KC_TRNS
|
||||
|
||||
const uint16_t keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
|
||||
/* Layer 0: Default Layer
|
||||
* ,-----------------------------------------------------------.
|
||||
* |Esc| 1| 2| 3| 4| 5| 6| 7| 8| 9| 0| -| =| `|BSp|
|
||||
* |-----------------------------------------------------------|
|
||||
* |Tab | Q| W| E| R| T| Y| U| I| O| P| [| ]| \|
|
||||
* |-----------------------------------------------------------|
|
||||
* |Contro| A| S| D| F| G| H| J| K| L| ;| '|Enter |
|
||||
* |-----------------------------------------------------------|
|
||||
* |Shift | Z| X| C| V| B| N| M| ,| .| /|Shift |Fn0|
|
||||
* |-----------------------------------------------------------'
|
||||
* | |Gui|Alt | Space |Alt |Gui| | |
|
||||
* `-----------------------------------------------------------'
|
||||
*/
|
||||
[0] = KEYMAP(
|
||||
KC_GRV, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS,KC_EQL, KC_BSLS, KC_BSPC, \
|
||||
KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC,KC_RBRC,KC_BSLS, \
|
||||
KC_CAPS,KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN,KC_QUOT,KC_NUHS,KC_ENT, \
|
||||
KC_LSFT,KC_NUBS,KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM,KC_DOT, KC_SLSH,KC_RSFT,KC_BSLS, \
|
||||
KC_LCTL,KC_LGUI,KC_LALT, KC_SPC, KC_RALT,KC_RGUI,MO(1), KC_RCTL),
|
||||
[1] = KEYMAP(
|
||||
KC_ESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, _______, _______, \
|
||||
_______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,_______,_______, \
|
||||
_______,_______, _______, _______, _______, _______, _______, _______, _______, _______, _______,_______,_______,_______, \
|
||||
_______,_______,_______, _______, _______, _______, _______, _______, _______, _______,_______, _______,_______,_______, \
|
||||
_______,_______,_______, _______, _______,_______,MO(1), _______)
|
||||
};
|
||||
@ -0,0 +1 @@
|
||||
# The default keymap for clueboard 60%
|
||||
@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright 2017 skully <skullydazed@gmail.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
#include "backlight.h"
|
||||
#include "led.h"
|
||||
#include "printf.h"
|
||||
|
||||
void backlight_init_ports(void) {
|
||||
printf("backlight_init_ports()\n");
|
||||
}
|
||||
|
||||
void backlight_set(uint8_t level) {
|
||||
printf("backlight_set(%d)\n", level);
|
||||
}
|
||||
@ -0,0 +1,177 @@
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <string.h>
|
||||
#include "hal.h"
|
||||
#include "timer.h"
|
||||
#include "wait.h"
|
||||
#include "printf.h"
|
||||
#include "backlight.h"
|
||||
#include "matrix.h"
|
||||
|
||||
|
||||
/* Clueboard 60%
|
||||
*
|
||||
* Column pins are input with internal pull-down.
|
||||
* Row pins are output and strobe with high.
|
||||
* Key is high or 1 when it turns on.
|
||||
*
|
||||
* col: { PA2, PA3, PA6, PB14, PB15, PA8, PA9, PA7, PB3, PB4, PC15, PC14, PC13, PB5, PB6 }
|
||||
* row: { PB0, PB1, PB2, PA15, PA10 }
|
||||
*/
|
||||
/* matrix state(1:on, 0:off) */
|
||||
static matrix_row_t matrix[MATRIX_ROWS];
|
||||
static matrix_row_t matrix_debouncing[MATRIX_COLS];
|
||||
static bool debouncing = false;
|
||||
static uint16_t debouncing_time = 0;
|
||||
|
||||
__attribute__ ((weak))
|
||||
void matrix_init_user(void) {}
|
||||
|
||||
__attribute__ ((weak))
|
||||
void matrix_scan_user(void) {}
|
||||
|
||||
__attribute__ ((weak))
|
||||
void matrix_init_kb(void) {
|
||||
matrix_init_user();
|
||||
}
|
||||
|
||||
__attribute__ ((weak))
|
||||
void matrix_scan_kb(void) {
|
||||
matrix_scan_user();
|
||||
}
|
||||
|
||||
void matrix_init(void) {
|
||||
printf("matrix init\n");
|
||||
//debug_matrix = true;
|
||||
|
||||
/* Column(sense) */
|
||||
palSetPadMode(GPIOA, 2, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 3, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 6, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 14, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 15, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 8, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 9, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 7, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 3, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 4, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOC, 15, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOC, 14, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOC, 13, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 5, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOB, 6, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
/* Row(strobe) */
|
||||
palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOB, 2, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOA, 15, PAL_MODE_INPUT_PULLDOWN);
|
||||
palSetPadMode(GPIOA, 10, PAL_MODE_INPUT_PULLDOWN);
|
||||
|
||||
memset(matrix, 0, MATRIX_ROWS);
|
||||
memset(matrix_debouncing, 0, MATRIX_COLS);
|
||||
|
||||
/* Setup capslock */
|
||||
// palSetPadMode(GPIOB, 7, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
// palClearPad(GPIOB, 7);
|
||||
|
||||
matrix_init_quantum();
|
||||
}
|
||||
|
||||
uint8_t matrix_scan(void) {
|
||||
for (int col = 0; col < MATRIX_COLS; col++) {
|
||||
matrix_row_t data = 0;
|
||||
|
||||
// strobe col { PA2, PA3, PA6, PB14, PB15, PA8, PA9, PA7, PB3, PB4, PC14, PC15, PC13, PB5, PB6 }
|
||||
switch (col) {
|
||||
case 0: palSetPad(GPIOA, 2); break;
|
||||
case 1: palSetPad(GPIOA, 3); break;
|
||||
case 2: palSetPad(GPIOA, 6); break;
|
||||
case 3: palSetPad(GPIOB, 14); break;
|
||||
case 4: palSetPad(GPIOB, 15); break;
|
||||
case 5: palSetPad(GPIOA, 8); break;
|
||||
case 6: palSetPad(GPIOA, 9); break;
|
||||
case 7: palSetPad(GPIOA, 7); break;
|
||||
case 8: palSetPad(GPIOB, 3); break;
|
||||
case 9: palSetPad(GPIOB, 4); break;
|
||||
case 10: palSetPad(GPIOC, 15); break;
|
||||
case 11: palSetPad(GPIOC, 14); break;
|
||||
case 12: palSetPad(GPIOC, 13); break;
|
||||
case 13: palSetPad(GPIOB, 5); break;
|
||||
case 14: palSetPad(GPIOB, 6); break;
|
||||
}
|
||||
|
||||
// need wait to settle pin state
|
||||
wait_us(20);
|
||||
|
||||
// read row data { PB0, PB1, PB2, PA15, PA10 }
|
||||
data = (
|
||||
(palReadPad(GPIOB, 0) << 0 ) |
|
||||
(palReadPad(GPIOB, 1) << 1 ) |
|
||||
(palReadPad(GPIOB, 2) << 2 ) |
|
||||
(palReadPad(GPIOA, 15) << 3 ) |
|
||||
(palReadPad(GPIOA, 10) << 4 )
|
||||
);
|
||||
|
||||
// unstrobe col { PA2, PA3, PA6, PB14, PB15, PA8, PA9, PA7, PB3, PB4, PC15, PC14, PC13, PB5, PB6 }
|
||||
switch (col) {
|
||||
case 0: palClearPad(GPIOA, 2); break;
|
||||
case 1: palClearPad(GPIOA, 3); break;
|
||||
case 2: palClearPad(GPIOA, 6); break;
|
||||
case 3: palClearPad(GPIOB, 14); break;
|
||||
case 4: palClearPad(GPIOB, 15); break;
|
||||
case 5: palClearPad(GPIOA, 8); break;
|
||||
case 6: palClearPad(GPIOA, 9); break;
|
||||
case 7: palClearPad(GPIOA, 7); break;
|
||||
case 8: palClearPad(GPIOB, 3); break;
|
||||
case 9: palClearPad(GPIOB, 4); break;
|
||||
case 10: palClearPad(GPIOC, 15); break;
|
||||
case 11: palClearPad(GPIOC, 14); break;
|
||||
case 12: palClearPad(GPIOC, 13); break;
|
||||
case 13: palClearPad(GPIOB, 5); break;
|
||||
case 14: palClearPad(GPIOB, 6); break;
|
||||
}
|
||||
|
||||
if (matrix_debouncing[col] != data) {
|
||||
matrix_debouncing[col] = data;
|
||||
debouncing = true;
|
||||
debouncing_time = timer_read();
|
||||
}
|
||||
}
|
||||
if (debouncing && timer_elapsed(debouncing_time) > DEBOUNCE) {
|
||||
for (int row = 0; row < MATRIX_ROWS; row++) {
|
||||
matrix[row] = 0;
|
||||
for (int col = 0; col < MATRIX_COLS; col++) {
|
||||
matrix[row] |= ((matrix_debouncing[col] & (1 << row) ? 1 : 0) << col);
|
||||
}
|
||||
}
|
||||
debouncing = false;
|
||||
}
|
||||
|
||||
matrix_scan_quantum();
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
bool matrix_is_on(uint8_t row, uint8_t col) {
|
||||
return (matrix[row] & (1<<col));
|
||||
}
|
||||
|
||||
matrix_row_t matrix_get_row(uint8_t row) {
|
||||
return matrix[row];
|
||||
}
|
||||
|
||||
void matrix_print(void) {
|
||||
printf("\nr/c 01234567\n");
|
||||
for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
|
||||
printf("%X0: ", row);
|
||||
matrix_row_t data = matrix_get_row(row);
|
||||
for (int col = 0; col < MATRIX_COLS; col++) {
|
||||
if (data & (1<<col))
|
||||
printf("1");
|
||||
else
|
||||
printf("0");
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,257 @@
|
||||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef MCUCONF_H
|
||||
#define MCUCONF_H
|
||||
|
||||
/*
|
||||
* STM32F3xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 15...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#define STM32F3xx_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_HSI_ENABLED TRUE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED TRUE
|
||||
#define STM32_LSE_ENABLED FALSE
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
||||
#define STM32_PREDIV_VALUE 1
|
||||
#define STM32_PLLMUL_VALUE 9
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE1 STM32_PPRE1_DIV2
|
||||
#define STM32_PPRE2 STM32_PPRE2_DIV2
|
||||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||
#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
|
||||
#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
|
||||
#define STM32_USART1SW STM32_USART1SW_PCLK
|
||||
#define STM32_USART2SW STM32_USART2SW_PCLK
|
||||
#define STM32_USART3SW STM32_USART3SW_PCLK
|
||||
#define STM32_UART4SW STM32_UART4SW_PCLK
|
||||
#define STM32_UART5SW STM32_UART5SW_PCLK
|
||||
#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
|
||||
#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
|
||||
#define STM32_TIM1SW STM32_TIM1SW_PCLK2
|
||||
#define STM32_TIM8SW STM32_TIM8SW_PCLK2
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
#define STM32_USB_CLOCK_REQUIRED TRUE
|
||||
#define STM32_USBPRE STM32_USBPRE_DIV1P5
|
||||
|
||||
#undef STM32_HSE_BYPASS
|
||||
// #error "oh no"
|
||||
// #endif
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_DUAL_MODE FALSE
|
||||
#define STM32_ADC_COMPACT_SAMPLES FALSE
|
||||
#define STM32_ADC_USE_ADC1 FALSE
|
||||
#define STM32_ADC_USE_ADC2 FALSE
|
||||
#define STM32_ADC_USE_ADC3 FALSE
|
||||
#define STM32_ADC_USE_ADC4 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC3_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC4_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC4_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
||||
#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
||||
|
||||
/*
|
||||
* CAN driver system settings.
|
||||
*/
|
||||
#define STM32_CAN_USE_CAN1 FALSE
|
||||
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||
|
||||
/*
|
||||
* DAC driver system settings.
|
||||
*/
|
||||
#define STM32_DAC_DUAL_MODE FALSE
|
||||
#define STM32_DAC_USE_DAC1_CH1 TRUE
|
||||
#define STM32_DAC_USE_DAC1_CH2 TRUE
|
||||
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
|
||||
|
||||
/*
|
||||
* EXT driver system settings.
|
||||
*/
|
||||
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
|
||||
#define STM32_EXT_EXTI33_IRQ_PRIORITY 6
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM6 TRUE
|
||||
#define STM32_GPT_USE_TIM7 TRUE
|
||||
#define STM32_GPT_USE_TIM8 TRUE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 FALSE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 10
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 10
|
||||
#define STM32_I2C_USE_DMA TRUE
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 1
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 1
|
||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM8 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 FALSE
|
||||
#define STM32_PWM_USE_TIM8 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 FALSE
|
||||
#define STM32_SERIAL_USE_USART3 FALSE
|
||||
#define STM32_SERIAL_USE_UART4 FALSE
|
||||
#define STM32_SERIAL_USE_UART5 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define STM32_ST_IRQ_PRIORITY 8
|
||||
#define STM32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_USB1 TRUE
|
||||
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
|
||||
#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
|
||||
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
#define STM32_WDG_USE_IWDG FALSE
|
||||
|
||||
#endif /* MCUCONF_H */
|
||||
@ -0,0 +1,14 @@
|
||||
# Clueboard 60%
|
||||
|
||||
A fully customizable 60% keyboard.
|
||||
|
||||
* Keyboard Maintainer: [Zach White](https://github.com/skullydazed)
|
||||
* Hardware Supported: Clueboard 60% PCB
|
||||
* rev1 (1.0)
|
||||
* Hardware Availability: [clueboard.co](https://clueboard.co/)
|
||||
|
||||
Make example for this keyboard (after setting up your build environment):
|
||||
|
||||
make clueboard60-default
|
||||
|
||||
See [build environment setup](https://docs.qmk.fm/build_environment_setup.html) then the [make instructions](https://docs.qmk.fm/make_instructions.html) for more information.
|
||||
@ -0,0 +1,52 @@
|
||||
# project specific files
|
||||
SRC = matrix.c \
|
||||
led.c
|
||||
|
||||
## chip/board settings
|
||||
# - the next two should match the directories in
|
||||
# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
|
||||
MCU_FAMILY = STM32
|
||||
MCU_SERIES = STM32F3xx
|
||||
|
||||
# Linker script to use
|
||||
# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
|
||||
# or <this_dir>/ld/
|
||||
MCU_LDSCRIPT = STM32F303xC
|
||||
|
||||
# Startup code to use
|
||||
# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
|
||||
MCU_STARTUP = stm32f3xx
|
||||
|
||||
# Board: it should exist either in <chibios>/os/hal/boards/
|
||||
# or <this_dir>/boards
|
||||
BOARD = GENERIC_STM32_F303XC
|
||||
|
||||
# Cortex version
|
||||
MCU = cortex-m4
|
||||
|
||||
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
|
||||
ARMV = 7
|
||||
|
||||
# Vector table for application
|
||||
# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
|
||||
# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
|
||||
# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
|
||||
OPT_DEFS =
|
||||
|
||||
# Options to pass to dfu-util when flashing
|
||||
DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000
|
||||
|
||||
# Build Options
|
||||
# comment out to disable the options.
|
||||
#
|
||||
BOOTMAGIC_ENABLE = yes # Virtual DIP switch configuration
|
||||
## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.)
|
||||
MOUSEKEY_ENABLE = yes # Mouse keys
|
||||
EXTRAKEY_ENABLE = yes # Audio control and System control
|
||||
#CONSOLE_ENABLE = yes # Console for debug
|
||||
COMMAND_ENABLE = yes # Commands for debug and configuration
|
||||
#SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend
|
||||
NKRO_ENABLE = yes # USB Nkey Rollover
|
||||
CUSTOM_MATRIX = yes # Custom matrix file
|
||||
AUDIO_ENABLE = yes
|
||||
# SERIAL_LINK_ENABLE = yes
|
||||
@ -0,0 +1,606 @@
|
||||
/* Copyright 2016 Jack Humbert
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "audio.h"
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "print.h"
|
||||
#include "keymap.h"
|
||||
|
||||
#include "eeconfig.h"
|
||||
|
||||
// -----------------------------------------------------------------------------
|
||||
|
||||
int voices = 0;
|
||||
int voice_place = 0;
|
||||
float frequency = 0;
|
||||
float frequency_alt = 0;
|
||||
int volume = 0;
|
||||
long position = 0;
|
||||
|
||||
float frequencies[8] = {0, 0, 0, 0, 0, 0, 0, 0};
|
||||
int volumes[8] = {0, 0, 0, 0, 0, 0, 0, 0};
|
||||
bool sliding = false;
|
||||
|
||||
float place = 0;
|
||||
|
||||
uint8_t * sample;
|
||||
uint16_t sample_length = 0;
|
||||
|
||||
bool playing_notes = false;
|
||||
bool playing_note = false;
|
||||
float note_frequency = 0;
|
||||
float note_length = 0;
|
||||
uint8_t note_tempo = TEMPO_DEFAULT;
|
||||
float note_timbre = TIMBRE_DEFAULT;
|
||||
uint16_t note_position = 0;
|
||||
float (* notes_pointer)[][2];
|
||||
uint16_t notes_count;
|
||||
bool notes_repeat;
|
||||
bool note_resting = false;
|
||||
|
||||
uint8_t current_note = 0;
|
||||
uint8_t rest_counter = 0;
|
||||
|
||||
#ifdef VIBRATO_ENABLE
|
||||
float vibrato_counter = 0;
|
||||
float vibrato_strength = .5;
|
||||
float vibrato_rate = 0.125;
|
||||
#endif
|
||||
|
||||
float polyphony_rate = 0;
|
||||
|
||||
static bool audio_initialized = false;
|
||||
|
||||
audio_config_t audio_config;
|
||||
|
||||
uint16_t envelope_index = 0;
|
||||
bool glissando = true;
|
||||
|
||||
#ifndef STARTUP_SONG
|
||||
#define STARTUP_SONG SONG(STARTUP_SOUND)
|
||||
#endif
|
||||
float startup_song[][2] = STARTUP_SONG;
|
||||
|
||||
static void gpt_cb6(GPTDriver *gptp);
|
||||
static void gpt_cb7(GPTDriver *gptp);
|
||||
static void gpt_cb8(GPTDriver *gptp);
|
||||
|
||||
/*
|
||||
* GPT6 configuration.
|
||||
*/
|
||||
GPTConfig gpt6cfg1 = {
|
||||
.frequency = 440,
|
||||
.callback = gpt_cb6,
|
||||
.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
|
||||
.dier = 0U
|
||||
};
|
||||
|
||||
GPTConfig gpt7cfg1 = {
|
||||
.frequency = 440,
|
||||
.callback = gpt_cb7,
|
||||
.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
|
||||
.dier = 0U
|
||||
};
|
||||
|
||||
GPTConfig gpt8cfg1 = {
|
||||
.frequency = 10,
|
||||
.callback = gpt_cb8,
|
||||
.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
|
||||
.dier = 0U
|
||||
};
|
||||
|
||||
static void gpt_cb6(GPTDriver *gptp) {
|
||||
palTogglePad(GPIOA, 4);
|
||||
}
|
||||
|
||||
|
||||
static void gpt_cb7(GPTDriver *gptp) {
|
||||
palTogglePad(GPIOA, 5);
|
||||
}
|
||||
|
||||
void audio_init()
|
||||
{
|
||||
|
||||
if (audio_initialized)
|
||||
return;
|
||||
|
||||
// Check EEPROM
|
||||
// if (!eeconfig_is_enabled())
|
||||
// {
|
||||
// eeconfig_init();
|
||||
// }
|
||||
// audio_config.raw = eeconfig_read_audio();
|
||||
audio_config.enable = true;
|
||||
|
||||
palSetPadMode(GPIOA, 4, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetPadMode(GPIOA, 5, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
audio_initialized = true;
|
||||
|
||||
if (audio_config.enable) {
|
||||
PLAY_SONG(startup_song);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void stop_all_notes()
|
||||
{
|
||||
dprintf("audio stop all notes");
|
||||
|
||||
if (!audio_initialized) {
|
||||
audio_init();
|
||||
}
|
||||
voices = 0;
|
||||
|
||||
gptStopTimer(&GPTD6);
|
||||
gptStopTimer(&GPTD7);
|
||||
gptStopTimer(&GPTD8);
|
||||
|
||||
playing_notes = false;
|
||||
playing_note = false;
|
||||
frequency = 0;
|
||||
frequency_alt = 0;
|
||||
volume = 0;
|
||||
|
||||
for (uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
frequencies[i] = 0;
|
||||
volumes[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void stop_note(float freq)
|
||||
{
|
||||
dprintf("audio stop note freq=%d", (int)freq);
|
||||
|
||||
if (playing_note) {
|
||||
if (!audio_initialized) {
|
||||
audio_init();
|
||||
}
|
||||
for (int i = 7; i >= 0; i--) {
|
||||
if (frequencies[i] == freq) {
|
||||
frequencies[i] = 0;
|
||||
volumes[i] = 0;
|
||||
for (int j = i; (j < 7); j++) {
|
||||
frequencies[j] = frequencies[j+1];
|
||||
frequencies[j+1] = 0;
|
||||
volumes[j] = volumes[j+1];
|
||||
volumes[j+1] = 0;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
voices--;
|
||||
if (voices < 0)
|
||||
voices = 0;
|
||||
if (voice_place >= voices) {
|
||||
voice_place = 0;
|
||||
}
|
||||
if (voices == 0) {
|
||||
gptStopTimer(&GPTD6);
|
||||
gptStopTimer(&GPTD7);
|
||||
gptStopTimer(&GPTD8);
|
||||
frequency = 0;
|
||||
frequency_alt = 0;
|
||||
volume = 0;
|
||||
playing_note = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef VIBRATO_ENABLE
|
||||
|
||||
float mod(float a, int b)
|
||||
{
|
||||
float r = fmod(a, b);
|
||||
return r < 0 ? r + b : r;
|
||||
}
|
||||
|
||||
float vibrato(float average_freq) {
|
||||
#ifdef VIBRATO_STRENGTH_ENABLE
|
||||
float vibrated_freq = average_freq * pow(vibrato_lut[(int)vibrato_counter], vibrato_strength);
|
||||
#else
|
||||
float vibrated_freq = average_freq * vibrato_lut[(int)vibrato_counter];
|
||||
#endif
|
||||
vibrato_counter = mod((vibrato_counter + vibrato_rate * (1.0 + 440.0/average_freq)), VIBRATO_LUT_LENGTH);
|
||||
return vibrated_freq;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static void restart_gpt6(void) {
|
||||
// gptStopTimer(&GPTD6);
|
||||
|
||||
gptStart(&GPTD6, &gpt6cfg1);
|
||||
gptStartContinuous(&GPTD6, 2U);
|
||||
}
|
||||
|
||||
static void restart_gpt7(void) {
|
||||
// gptStopTimer(&GPTD7);
|
||||
|
||||
gptStart(&GPTD7, &gpt7cfg1);
|
||||
gptStartContinuous(&GPTD7, 2U);
|
||||
}
|
||||
|
||||
static void gpt_cb8(GPTDriver *gptp) {
|
||||
float freq;
|
||||
|
||||
if (playing_note) {
|
||||
if (voices > 0) {
|
||||
|
||||
float freq_alt = 0;
|
||||
if (voices > 1) {
|
||||
if (polyphony_rate == 0) {
|
||||
if (glissando) {
|
||||
if (frequency_alt != 0 && frequency_alt < frequencies[voices - 2] && frequency_alt < frequencies[voices - 2] * pow(2, -440/frequencies[voices - 2]/12/2)) {
|
||||
frequency_alt = frequency_alt * pow(2, 440/frequency_alt/12/2);
|
||||
} else if (frequency_alt != 0 && frequency_alt > frequencies[voices - 2] && frequency_alt > frequencies[voices - 2] * pow(2, 440/frequencies[voices - 2]/12/2)) {
|
||||
frequency_alt = frequency_alt * pow(2, -440/frequency_alt/12/2);
|
||||
} else {
|
||||
frequency_alt = frequencies[voices - 2];
|
||||
}
|
||||
} else {
|
||||
frequency_alt = frequencies[voices - 2];
|
||||
}
|
||||
|
||||
#ifdef VIBRATO_ENABLE
|
||||
if (vibrato_strength > 0) {
|
||||
freq_alt = vibrato(frequency_alt);
|
||||
} else {
|
||||
freq_alt = frequency_alt;
|
||||
}
|
||||
#else
|
||||
freq_alt = frequency_alt;
|
||||
#endif
|
||||
}
|
||||
|
||||
if (envelope_index < 65535) {
|
||||
envelope_index++;
|
||||
}
|
||||
|
||||
freq_alt = voice_envelope(freq_alt);
|
||||
|
||||
if (freq_alt < 30.517578125) {
|
||||
freq_alt = 30.52;
|
||||
}
|
||||
|
||||
if (gpt6cfg1.frequency != (uint16_t)freq_alt) {
|
||||
gpt6cfg1.frequency = freq_alt;
|
||||
restart_gpt6();
|
||||
}
|
||||
//note_timbre;
|
||||
} else {
|
||||
// gptStopTimer(&GPTD6);
|
||||
}
|
||||
|
||||
if (polyphony_rate > 0) {
|
||||
if (voices > 1) {
|
||||
voice_place %= voices;
|
||||
if (place++ > (frequencies[voice_place] / polyphony_rate)) {
|
||||
voice_place = (voice_place + 1) % voices;
|
||||
place = 0.0;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef VIBRATO_ENABLE
|
||||
if (vibrato_strength > 0) {
|
||||
freq = vibrato(frequencies[voice_place]);
|
||||
} else {
|
||||
freq = frequencies[voice_place];
|
||||
}
|
||||
#else
|
||||
freq = frequencies[voice_place];
|
||||
#endif
|
||||
} else {
|
||||
if (glissando) {
|
||||
if (frequency != 0 && frequency < frequencies[voices - 1] && frequency < frequencies[voices - 1] * pow(2, -440/frequencies[voices - 1]/12/2)) {
|
||||
frequency = frequency * pow(2, 440/frequency/12/2);
|
||||
} else if (frequency != 0 && frequency > frequencies[voices - 1] && frequency > frequencies[voices - 1] * pow(2, 440/frequencies[voices - 1]/12/2)) {
|
||||
frequency = frequency * pow(2, -440/frequency/12/2);
|
||||
} else {
|
||||
frequency = frequencies[voices - 1];
|
||||
}
|
||||
} else {
|
||||
frequency = frequencies[voices - 1];
|
||||
}
|
||||
|
||||
#ifdef VIBRATO_ENABLE
|
||||
if (vibrato_strength > 0) {
|
||||
freq = vibrato(frequency);
|
||||
} else {
|
||||
freq = frequency;
|
||||
}
|
||||
#else
|
||||
freq = frequency;
|
||||
#endif
|
||||
}
|
||||
|
||||
if (envelope_index < 65535) {
|
||||
envelope_index++;
|
||||
}
|
||||
|
||||
freq = voice_envelope(freq);
|
||||
|
||||
if (freq < 30.517578125) {
|
||||
freq = 30.52;
|
||||
}
|
||||
|
||||
|
||||
if (gpt7cfg1.frequency != (uint16_t)freq) {
|
||||
gpt7cfg1.frequency = freq;
|
||||
restart_gpt7();
|
||||
}
|
||||
//note_timbre;
|
||||
} else {
|
||||
// gptStopTimer(&GPTD7);
|
||||
}
|
||||
}
|
||||
|
||||
if (playing_notes) {
|
||||
if (note_frequency > 0) {
|
||||
#ifdef VIBRATO_ENABLE
|
||||
if (vibrato_strength > 0) {
|
||||
freq = vibrato(note_frequency);
|
||||
} else {
|
||||
freq = note_frequency;
|
||||
}
|
||||
#else
|
||||
freq = note_frequency;
|
||||
#endif
|
||||
|
||||
if (envelope_index < 65535) {
|
||||
envelope_index++;
|
||||
}
|
||||
freq = voice_envelope(freq);
|
||||
|
||||
|
||||
if (gpt6cfg1.frequency != (uint16_t)freq) {
|
||||
gpt6cfg1.frequency = freq;
|
||||
restart_gpt6();
|
||||
gpt7cfg1.frequency = freq;
|
||||
restart_gpt7();
|
||||
}
|
||||
//note_timbre;
|
||||
} else {
|
||||
// gptStopTimer(&GPTD6);
|
||||
// gptStopTimer(&GPTD7);
|
||||
}
|
||||
|
||||
note_position++;
|
||||
bool end_of_note = false;
|
||||
if (gpt6cfg1.frequency > 0) {
|
||||
if (!note_resting)
|
||||
end_of_note = (note_position >= (note_length*16 - 1));
|
||||
else
|
||||
end_of_note = (note_position >= (note_length*16));
|
||||
} else {
|
||||
end_of_note = (note_position >= (note_length*16));
|
||||
}
|
||||
|
||||
if (end_of_note) {
|
||||
current_note++;
|
||||
if (current_note >= notes_count) {
|
||||
if (notes_repeat) {
|
||||
current_note = 0;
|
||||
} else {
|
||||
gptStopTimer(&GPTD6);
|
||||
gptStopTimer(&GPTD7);
|
||||
// gptStopTimer(&GPTD8);
|
||||
playing_notes = false;
|
||||
return;
|
||||
}
|
||||
}
|
||||
if (!note_resting) {
|
||||
note_resting = true;
|
||||
current_note--;
|
||||
if ((*notes_pointer)[current_note][0] == (*notes_pointer)[current_note + 1][0]) {
|
||||
note_frequency = 0;
|
||||
note_length = 1;
|
||||
} else {
|
||||
note_frequency = (*notes_pointer)[current_note][0];
|
||||
note_length = 1;
|
||||
}
|
||||
} else {
|
||||
note_resting = false;
|
||||
envelope_index = 0;
|
||||
note_frequency = (*notes_pointer)[current_note][0];
|
||||
note_length = ((*notes_pointer)[current_note][1] / 4) * (((float)note_tempo) / 100);
|
||||
}
|
||||
|
||||
note_position = 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (!audio_config.enable) {
|
||||
playing_notes = false;
|
||||
playing_note = false;
|
||||
}
|
||||
}
|
||||
|
||||
void play_note(float freq, int vol) {
|
||||
|
||||
dprintf("audio play note freq=%d vol=%d", (int)freq, vol);
|
||||
|
||||
if (!audio_initialized) {
|
||||
audio_init();
|
||||
}
|
||||
|
||||
if (audio_config.enable && voices < 8) {
|
||||
|
||||
// Cancel notes if notes are playing
|
||||
if (playing_notes)
|
||||
stop_all_notes();
|
||||
|
||||
playing_note = true;
|
||||
|
||||
envelope_index = 0;
|
||||
|
||||
if (freq > 0) {
|
||||
frequencies[voices] = freq;
|
||||
volumes[voices] = vol;
|
||||
voices++;
|
||||
}
|
||||
|
||||
gptStart(&GPTD8, &gpt8cfg1);
|
||||
gptStartContinuous(&GPTD8, 2U);
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void play_notes(float (*np)[][2], uint16_t n_count, bool n_repeat)
|
||||
{
|
||||
|
||||
if (!audio_initialized) {
|
||||
audio_init();
|
||||
}
|
||||
|
||||
if (audio_config.enable) {
|
||||
|
||||
// Cancel note if a note is playing
|
||||
if (playing_note)
|
||||
stop_all_notes();
|
||||
|
||||
playing_notes = true;
|
||||
|
||||
notes_pointer = np;
|
||||
notes_count = n_count;
|
||||
notes_repeat = n_repeat;
|
||||
|
||||
place = 0;
|
||||
current_note = 0;
|
||||
|
||||
note_frequency = (*notes_pointer)[current_note][0];
|
||||
note_length = ((*notes_pointer)[current_note][1] / 4) * (((float)note_tempo) / 100);
|
||||
note_position = 0;
|
||||
|
||||
gptStart(&GPTD8, &gpt8cfg1);
|
||||
gptStartContinuous(&GPTD8, 2U);
|
||||
restart_gpt6();
|
||||
restart_gpt7();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
bool is_playing_notes(void) {
|
||||
return playing_notes;
|
||||
}
|
||||
|
||||
bool is_audio_on(void) {
|
||||
return (audio_config.enable != 0);
|
||||
}
|
||||
|
||||
void audio_toggle(void) {
|
||||
audio_config.enable ^= 1;
|
||||
eeconfig_update_audio(audio_config.raw);
|
||||
if (audio_config.enable)
|
||||
audio_on_user();
|
||||
}
|
||||
|
||||
void audio_on(void) {
|
||||
audio_config.enable = 1;
|
||||
eeconfig_update_audio(audio_config.raw);
|
||||
audio_on_user();
|
||||
}
|
||||
|
||||
void audio_off(void) {
|
||||
audio_config.enable = 0;
|
||||
eeconfig_update_audio(audio_config.raw);
|
||||
}
|
||||
|
||||
#ifdef VIBRATO_ENABLE
|
||||
|
||||
// Vibrato rate functions
|
||||
|
||||
void set_vibrato_rate(float rate) {
|
||||
vibrato_rate = rate;
|
||||
}
|
||||
|
||||
void increase_vibrato_rate(float change) {
|
||||
vibrato_rate *= change;
|
||||
}
|
||||
|
||||
void decrease_vibrato_rate(float change) {
|
||||
vibrato_rate /= change;
|
||||
}
|
||||
|
||||
#ifdef VIBRATO_STRENGTH_ENABLE
|
||||
|
||||
void set_vibrato_strength(float strength) {
|
||||
vibrato_strength = strength;
|
||||
}
|
||||
|
||||
void increase_vibrato_strength(float change) {
|
||||
vibrato_strength *= change;
|
||||
}
|
||||
|
||||
void decrease_vibrato_strength(float change) {
|
||||
vibrato_strength /= change;
|
||||
}
|
||||
|
||||
#endif /* VIBRATO_STRENGTH_ENABLE */
|
||||
|
||||
#endif /* VIBRATO_ENABLE */
|
||||
|
||||
// Polyphony functions
|
||||
|
||||
void set_polyphony_rate(float rate) {
|
||||
polyphony_rate = rate;
|
||||
}
|
||||
|
||||
void enable_polyphony() {
|
||||
polyphony_rate = 5;
|
||||
}
|
||||
|
||||
void disable_polyphony() {
|
||||
polyphony_rate = 0;
|
||||
}
|
||||
|
||||
void increase_polyphony_rate(float change) {
|
||||
polyphony_rate *= change;
|
||||
}
|
||||
|
||||
void decrease_polyphony_rate(float change) {
|
||||
polyphony_rate /= change;
|
||||
}
|
||||
|
||||
// Timbre function
|
||||
|
||||
void set_timbre(float timbre) {
|
||||
note_timbre = timbre;
|
||||
}
|
||||
|
||||
// Tempo functions
|
||||
|
||||
void set_tempo(uint8_t tempo) {
|
||||
note_tempo = tempo;
|
||||
}
|
||||
|
||||
void decrease_tempo(uint8_t tempo_change) {
|
||||
note_tempo += tempo_change;
|
||||
}
|
||||
|
||||
void increase_tempo(uint8_t tempo_change) {
|
||||
if (note_tempo - tempo_change < 10) {
|
||||
note_tempo = 10;
|
||||
} else {
|
||||
note_tempo -= tempo_change;
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue