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84 lines
1.6 KiB
Prolog
84 lines
1.6 KiB
Prolog
8 years ago
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update=Wednesday, November 05, 2014 'pmt' 12:08:47 pm
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version=1
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last_client=pcbnew
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[cvpcb]
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version=1
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NetIExt=net
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[cvpcb/libraries]
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EquName1=devcms
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[general]
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version=1
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[eeschema]
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version=1
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PageLayoutDescrFile=
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SubpartIdSeparator=0
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SubpartFirstId=65
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LibDir=../../../lib/kicad/library
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NetFmtName=
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RptD_X=0
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RptD_Y=100
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RptLab=1
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LabSize=60
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[eeschema/libraries]
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LibName1=power
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LibName2=device
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LibName3=transistors
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LibName4=conn
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LibName5=linear
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LibName6=regul
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LibName7=74xx
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LibName8=cmos4000
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LibName9=adc-dac
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LibName10=memory
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LibName11=xilinx
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LibName12=special
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LibName13=microcontrollers
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LibName14=dsp
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LibName15=microchip
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LibName16=analog_switches
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LibName17=motorola
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LibName18=texas
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LibName19=intel
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LibName20=audio
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LibName21=interface
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LibName22=digital-audio
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LibName23=philips
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LibName24=display
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LibName25=cypress
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LibName26=siliconi
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LibName27=opto
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LibName28=atmel
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LibName29=contrib
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LibName30=valves
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LibName31=custom
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[pcbnew]
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version=1
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LastNetListRead=
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UseCmpFile=1
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PadDrill=1.016000000000
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PadDrillOvalY=1.016000000000
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PadSizeH=1.524000000000
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PadSizeV=1.524000000000
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PcbTextSizeV=1.500000000000
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PcbTextSizeH=1.500000000000
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PcbTextThickness=0.300000000000
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ModuleTextSizeV=1.000000000000
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ModuleTextSizeH=1.000000000000
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ModuleTextSizeThickness=0.150000000000
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SolderMaskClearance=0.000000000000
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SolderMaskMinWidth=0.000000000000
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DrawSegmentWidth=0.200000000000
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BoardOutlineThickness=0.100000000000
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ModuleOutlineThickness=0.150000000000
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[pcbnew/libraries]
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LibDir=../../../lib/kicad/modules
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LibName1=custom
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LibName2=Sockets
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LibName3=Connect
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LibName4=Discret
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LibName5=Divers
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LibName6=Display
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LibName7=LEDs
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LibName8=SMD_Packages
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LibName9=Sockets_DIP
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