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558 lines
16 KiB
C++
558 lines
16 KiB
C++
10 years ago
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/* Copyright (c) 2010-2011 mbed.org, MIT License
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
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* and associated documentation files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F)
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#include "USBHAL.h"
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USBHAL * USBHAL::instance;
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static volatile int epComplete = 0;
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// Convert physical endpoint number to register bit
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#define EP(endpoint) (1<<(endpoint))
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// Convert physical to logical
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#define PHY_TO_LOG(endpoint) ((endpoint)>>1)
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// Get endpoint direction
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#define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
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#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
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#define BD_OWN_MASK (1<<7)
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#define BD_DATA01_MASK (1<<6)
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#define BD_KEEP_MASK (1<<5)
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#define BD_NINC_MASK (1<<4)
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#define BD_DTS_MASK (1<<3)
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#define BD_STALL_MASK (1<<2)
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#define TX 1
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#define RX 0
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#define ODD 0
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#define EVEN 1
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// this macro waits a physical endpoint number
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#define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd)))
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#define SETUP_TOKEN 0x0D
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#define IN_TOKEN 0x09
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#define OUT_TOKEN 0x01
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#define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F)
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// for each endpt: 8 bytes
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typedef struct BDT {
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uint8_t info; // BD[0:7]
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uint8_t dummy; // RSVD: BD[8:15]
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uint16_t byte_count; // BD[16:32]
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uint32_t address; // Addr
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} BDT;
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// there are:
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// * 16 bidirectionnal endpt -> 32 physical endpt
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// * as there are ODD and EVEN buffer -> 32*2 bdt
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__attribute__((__aligned__(512))) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2];
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uint8_t * endpoint_buffer[(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2];
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uint8_t * endpoint_buffer_iso[2*2];
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static uint8_t set_addr = 0;
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static uint8_t addr = 0;
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static uint32_t Data1 = 0x55555555;
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static uint32_t frameNumber() {
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return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF);
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}
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uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
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return 0;
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}
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USBHAL::USBHAL(void) {
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// Disable IRQ
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NVIC_DisableIRQ(USB0_IRQn);
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#if defined(TARGET_K64F)
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MPU->CESR=0;
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#endif
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// fill in callback array
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epCallback[0] = &USBHAL::EP1_OUT_callback;
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epCallback[1] = &USBHAL::EP1_IN_callback;
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epCallback[2] = &USBHAL::EP2_OUT_callback;
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epCallback[3] = &USBHAL::EP2_IN_callback;
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epCallback[4] = &USBHAL::EP3_OUT_callback;
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epCallback[5] = &USBHAL::EP3_IN_callback;
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epCallback[6] = &USBHAL::EP4_OUT_callback;
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epCallback[7] = &USBHAL::EP4_IN_callback;
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epCallback[8] = &USBHAL::EP5_OUT_callback;
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epCallback[9] = &USBHAL::EP5_IN_callback;
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epCallback[10] = &USBHAL::EP6_OUT_callback;
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epCallback[11] = &USBHAL::EP6_IN_callback;
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epCallback[12] = &USBHAL::EP7_OUT_callback;
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epCallback[13] = &USBHAL::EP7_IN_callback;
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epCallback[14] = &USBHAL::EP8_OUT_callback;
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epCallback[15] = &USBHAL::EP8_IN_callback;
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epCallback[16] = &USBHAL::EP9_OUT_callback;
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epCallback[17] = &USBHAL::EP9_IN_callback;
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epCallback[18] = &USBHAL::EP10_OUT_callback;
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epCallback[19] = &USBHAL::EP10_IN_callback;
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epCallback[20] = &USBHAL::EP11_OUT_callback;
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epCallback[21] = &USBHAL::EP11_IN_callback;
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epCallback[22] = &USBHAL::EP12_OUT_callback;
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epCallback[23] = &USBHAL::EP12_IN_callback;
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epCallback[24] = &USBHAL::EP13_OUT_callback;
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epCallback[25] = &USBHAL::EP13_IN_callback;
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epCallback[26] = &USBHAL::EP14_OUT_callback;
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epCallback[27] = &USBHAL::EP14_IN_callback;
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epCallback[28] = &USBHAL::EP15_OUT_callback;
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epCallback[29] = &USBHAL::EP15_IN_callback;
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#if defined(TARGET_KL43Z)
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// enable USBFS clock
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SIM->SCGC4 |= SIM_SCGC4_USBFS_MASK;
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// enable the IRC48M clock
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USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
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// enable the USB clock recovery tuning
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USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
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// choose usb src clock
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SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK;
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#elif defined(TARGET_INFINITY)
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// USB clock source: FLL
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SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK;
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// enable OTG clock
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SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
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#else
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// choose usb src as PLL
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SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
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SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT));
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// enable OTG clock
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SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
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#endif
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// Attach IRQ
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instance = this;
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NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
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NVIC_EnableIRQ(USB0_IRQn);
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// USB Module Configuration
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// Reset USB Module
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USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
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while(USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK);
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// Set BDT Base Register
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USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8);
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USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16);
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USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24);
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// Clear interrupt flag
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USB0->ISTAT = 0xff;
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// USB Interrupt Enablers
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USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK |
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USB_INTEN_SOFTOKEN_MASK |
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USB_INTEN_ERROREN_MASK |
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USB_INTEN_USBRSTEN_MASK;
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// Disable weak pull downs
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USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK);
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USB0->USBTRC0 |= 0x40;
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}
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USBHAL::~USBHAL(void) { }
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void USBHAL::connect(void) {
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// enable USB
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USB0->CTL |= USB_CTL_USBENSOFEN_MASK;
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// Pull up enable
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USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
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}
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void USBHAL::disconnect(void) {
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// disable USB
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USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK;
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// Pull up disable
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USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
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//Free buffers if required:
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for (int i = 0; i<(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2; i++) {
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free(endpoint_buffer[i]);
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endpoint_buffer[i] = NULL;
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}
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free(endpoint_buffer_iso[2]);
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endpoint_buffer_iso[2] = NULL;
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free(endpoint_buffer_iso[0]);
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endpoint_buffer_iso[0] = NULL;
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}
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void USBHAL::configureDevice(void) {
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// not needed
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}
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void USBHAL::unconfigureDevice(void) {
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// not needed
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}
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void USBHAL::setAddress(uint8_t address) {
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// we don't set the address now otherwise the usb controller does not ack
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// we set a flag instead
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// see usbisr when an IN token is received
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set_addr = 1;
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addr = address;
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}
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bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
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uint32_t handshake_flag = 0;
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uint8_t * buf;
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if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
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return false;
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}
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uint32_t log_endpoint = PHY_TO_LOG(endpoint);
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if ((flags & ISOCHRONOUS) == 0) {
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handshake_flag = USB_ENDPT_EPHSHK_MASK;
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if (IN_EP(endpoint)) {
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if (endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] == NULL)
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endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] = (uint8_t *) malloc (64*2);
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buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
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} else {
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if (endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] == NULL)
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endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] = (uint8_t *) malloc (64*2);
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buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
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}
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} else {
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if (IN_EP(endpoint)) {
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if (endpoint_buffer_iso[2] == NULL)
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endpoint_buffer_iso[2] = (uint8_t *) malloc (1023*2);
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buf = &endpoint_buffer_iso[2][0];
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} else {
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if (endpoint_buffer_iso[0] == NULL)
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endpoint_buffer_iso[0] = (uint8_t *) malloc (1023*2);
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buf = &endpoint_buffer_iso[0][0];
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}
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}
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// IN endpt -> device to host (TX)
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if (IN_EP(endpoint)) {
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USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
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USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran
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bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
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bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
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}
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// OUT endpt -> host to device (RX)
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else {
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USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
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USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran.
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bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket;
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bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf;
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bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_OWN_MASK | BD_DTS_MASK;
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bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0;
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}
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Data1 |= (1 << endpoint);
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return true;
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}
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// read setup packet
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void USBHAL::EP0setup(uint8_t *buffer) {
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uint32_t sz;
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endpointReadResult(EP0OUT, buffer, &sz);
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}
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void USBHAL::EP0readStage(void) {
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Data1 &= ~1UL; // set DATA0
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bdt[0].info = (BD_DTS_MASK | BD_OWN_MASK);
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}
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void USBHAL::EP0read(void) {
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uint32_t idx = EP_BDT_IDX(PHY_TO_LOG(EP0OUT), RX, 0);
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bdt[idx].byte_count = MAX_PACKET_SIZE_EP0;
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}
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uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
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uint32_t sz;
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endpointReadResult(EP0OUT, buffer, &sz);
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return sz;
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}
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void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
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endpointWrite(EP0IN, buffer, size);
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}
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void USBHAL::EP0getWriteResult(void) {
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}
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void USBHAL::EP0stall(void) {
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stallEndpoint(EP0OUT);
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}
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EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
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endpoint = PHY_TO_LOG(endpoint);
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uint32_t idx = EP_BDT_IDX(endpoint, RX, 0);
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bdt[idx].byte_count = maximumSize;
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return EP_PENDING;
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}
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EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
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uint32_t n, sz, idx, setup = 0;
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uint8_t not_iso;
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uint8_t * ep_buf;
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uint32_t log_endpoint = PHY_TO_LOG(endpoint);
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if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
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return EP_INVALID;
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}
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// if read on a IN endpoint -> error
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if (IN_EP(endpoint)) {
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return EP_INVALID;
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}
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idx = EP_BDT_IDX(log_endpoint, RX, 0);
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sz = bdt[idx].byte_count;
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not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK;
|
||
|
|
|
||
|
|
//for isochronous endpoint, we don't wait an interrupt
|
||
|
|
if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) {
|
||
|
|
return EP_PENDING;
|
||
|
|
}
|
||
|
|
|
||
|
|
if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) {
|
||
|
|
setup = 1;
|
||
|
|
}
|
||
|
|
|
||
|
|
// non iso endpoint
|
||
|
|
if (not_iso) {
|
||
|
|
ep_buf = endpoint_buffer[idx];
|
||
|
|
} else {
|
||
|
|
ep_buf = endpoint_buffer_iso[0];
|
||
|
|
}
|
||
|
|
|
||
|
|
for (n = 0; n < sz; n++) {
|
||
|
|
buffer[n] = ep_buf[n];
|
||
|
|
}
|
||
|
|
|
||
|
|
if (((Data1 >> endpoint) & 1) == ((bdt[idx].info >> 6) & 1)) {
|
||
|
|
if (setup && (buffer[6] == 0)) // if no setup data stage,
|
||
|
|
Data1 &= ~1UL; // set DATA0
|
||
|
|
else
|
||
|
|
Data1 ^= (1 << endpoint);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (((Data1 >> endpoint) & 1)) {
|
||
|
|
bdt[idx].info = BD_DTS_MASK | BD_DATA01_MASK | BD_OWN_MASK;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
bdt[idx].info = BD_DTS_MASK | BD_OWN_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
|
||
|
|
*bytesRead = sz;
|
||
|
|
|
||
|
|
epComplete &= ~EP(endpoint);
|
||
|
|
return EP_COMPLETED;
|
||
|
|
}
|
||
|
|
|
||
|
|
EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
|
||
|
|
uint32_t idx, n;
|
||
|
|
uint8_t * ep_buf;
|
||
|
|
|
||
|
|
if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
|
||
|
|
return EP_INVALID;
|
||
|
|
}
|
||
|
|
|
||
|
|
// if write on a OUT endpoint -> error
|
||
|
|
if (OUT_EP(endpoint)) {
|
||
|
|
return EP_INVALID;
|
||
|
|
}
|
||
|
|
|
||
|
|
idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0);
|
||
|
|
bdt[idx].byte_count = size;
|
||
|
|
|
||
|
|
|
||
|
|
// non iso endpoint
|
||
|
|
if (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPHSHK_MASK) {
|
||
|
|
ep_buf = endpoint_buffer[idx];
|
||
|
|
} else {
|
||
|
|
ep_buf = endpoint_buffer_iso[2];
|
||
|
|
}
|
||
|
|
|
||
|
|
for (n = 0; n < size; n++) {
|
||
|
|
ep_buf[n] = data[n];
|
||
|
|
}
|
||
|
|
|
||
|
|
if ((Data1 >> endpoint) & 1) {
|
||
|
|
bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
|
||
|
|
} else {
|
||
|
|
bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
Data1 ^= (1 << endpoint);
|
||
|
|
|
||
|
|
return EP_PENDING;
|
||
|
|
}
|
||
|
|
|
||
|
|
EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
|
||
|
|
if (epComplete & EP(endpoint)) {
|
||
|
|
epComplete &= ~EP(endpoint);
|
||
|
|
return EP_COMPLETED;
|
||
|
|
}
|
||
|
|
|
||
|
|
return EP_PENDING;
|
||
|
|
}
|
||
|
|
|
||
|
|
void USBHAL::stallEndpoint(uint8_t endpoint) {
|
||
|
|
USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
void USBHAL::unstallEndpoint(uint8_t endpoint) {
|
||
|
|
USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool USBHAL::getEndpointStallState(uint8_t endpoint) {
|
||
|
|
uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK);
|
||
|
|
return (stall) ? true : false;
|
||
|
|
}
|
||
|
|
|
||
|
|
void USBHAL::remoteWakeup(void) {
|
||
|
|
// [TODO]
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
void USBHAL::_usbisr(void) {
|
||
|
|
instance->usbisr();
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
void USBHAL::usbisr(void) {
|
||
|
|
uint8_t i;
|
||
|
|
uint8_t istat = USB0->ISTAT;
|
||
|
|
|
||
|
|
// reset interrupt
|
||
|
|
if (istat & USB_ISTAT_USBRST_MASK) {
|
||
|
|
// disable all endpt
|
||
|
|
for(i = 0; i < 16; i++) {
|
||
|
|
USB0->ENDPOINT[i].ENDPT = 0x00;
|
||
|
|
}
|
||
|
|
|
||
|
|
// enable control endpoint
|
||
|
|
realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
|
||
|
|
realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
|
||
|
|
|
||
|
|
Data1 = 0x55555555;
|
||
|
|
USB0->CTL |= USB_CTL_ODDRST_MASK;
|
||
|
|
|
||
|
|
USB0->ISTAT = 0xFF; // clear all interrupt status flags
|
||
|
|
USB0->ERRSTAT = 0xFF; // clear all error flags
|
||
|
|
USB0->ERREN = 0xFF; // enable error interrupt sources
|
||
|
|
USB0->ADDR = 0x00; // set default address
|
||
|
|
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
// resume interrupt
|
||
|
|
if (istat & USB_ISTAT_RESUME_MASK) {
|
||
|
|
USB0->ISTAT = USB_ISTAT_RESUME_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
// SOF interrupt
|
||
|
|
if (istat & USB_ISTAT_SOFTOK_MASK) {
|
||
|
|
USB0->ISTAT = USB_ISTAT_SOFTOK_MASK;
|
||
|
|
// SOF event, read frame number
|
||
|
|
SOF(frameNumber());
|
||
|
|
}
|
||
|
|
|
||
|
|
// stall interrupt
|
||
|
|
if (istat & 1<<7) {
|
||
|
|
if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK)
|
||
|
|
USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
|
||
|
|
USB0->ISTAT |= USB_ISTAT_STALL_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
// token interrupt
|
||
|
|
if (istat & 1<<3) {
|
||
|
|
uint32_t num = (USB0->STAT >> 4) & 0x0F;
|
||
|
|
uint32_t dir = (USB0->STAT >> 3) & 0x01;
|
||
|
|
uint32_t ev_odd = (USB0->STAT >> 2) & 0x01;
|
||
|
|
|
||
|
|
// setup packet
|
||
|
|
if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) {
|
||
|
|
Data1 &= ~0x02;
|
||
|
|
bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK;
|
||
|
|
bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK;
|
||
|
|
|
||
|
|
// EP0 SETUP event (SETUP data received)
|
||
|
|
EP0setupCallback();
|
||
|
|
|
||
|
|
} else {
|
||
|
|
// OUT packet
|
||
|
|
if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) {
|
||
|
|
if (num == 0)
|
||
|
|
EP0out();
|
||
|
|
else {
|
||
|
|
epComplete |= (1 << EP(num));
|
||
|
|
if ((instance->*(epCallback[EP(num) - 2]))()) {
|
||
|
|
epComplete &= ~(1 << EP(num));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
// IN packet
|
||
|
|
if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) {
|
||
|
|
if (num == 0) {
|
||
|
|
EP0in();
|
||
|
|
if (set_addr == 1) {
|
||
|
|
USB0->ADDR = addr & 0x7F;
|
||
|
|
set_addr = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
epComplete |= (1 << (EP(num) + 1));
|
||
|
|
if ((instance->*(epCallback[EP(num) + 1 - 2]))()) {
|
||
|
|
epComplete &= ~(1 << (EP(num) + 1));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
USB0->ISTAT = USB_ISTAT_TOKDNE_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
// sleep interrupt
|
||
|
|
if (istat & 1<<4) {
|
||
|
|
USB0->ISTAT |= USB_ISTAT_SLEEP_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
// error interrupt
|
||
|
|
if (istat & USB_ISTAT_ERROR_MASK) {
|
||
|
|
USB0->ERRSTAT = 0xFF;
|
||
|
|
USB0->ISTAT |= USB_ISTAT_ERROR_MASK;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
#endif
|